ACT5101 datasheet(20/59 Pages) QORVO

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Data Sheet Rev. E, November 2019 | Subject to change without notice

20 of 59

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ACT510x

23V Buck-Boost Converter with Integrated MOSFETs

period, it will not clear the nIRQ output. This

fault is detected in HIZ and POWER ON Modes.

Over Temperature Shut Down - Any time the

die temperature exceeds the TSHUT (160°C)

threshold, nIRQ is asserted. This is a level sen-

sitive function. The die temperature must be

below the TSHUT_HYST AND a 1 must be written

into nIRQ_CLEAR to deassert nIRQ. Die TSD

is active in all modes.

FET Overcurrent Fault – If the IC is disabled

from switching because of a FET overcurrent

fault, nIRQ is asserted. This is a level sensitive

function. This fault is latched, so the latch must

cleared by manually going into HIZ Mode AND

a 1 must be written into nIRQ_CLEAR to

deassert nIRQ.

ADC Data Ready – If the ADC is enabled, and

a conversion is completed, nIRQ is asserted.

This is an edge triggered event. A 1 must be

written into nIRQ_CLEAR to deassert nIRQ.

This is active in all modes when the ADC is

enabled.

HIZ Enter – The ACT510x asserts nIRQ when

it enters HIZ mode. This is an edge triggered

event. 1 must be written into nIRQ_CLEAR to

deassert nIRQ. The IC asserts nIRQ when

entering HIZ mode to signal a fault or other

condition that might have caused the IC to jump

out POWER ON mode un-expectantly.

I2C Fault – If an I2C command takes more than

100ms between the start bit and the stop bit,

nIRQ is asserted. This is an edge triggered

event. The I2C state machine clears out any

partial data, resets, and waits for another start

bit for another I2C command. The state

machine clears and restarts the 100ms timer

when it receives the next start bit.

VIN Above VVIN_OV (23.5V) - If VIN is above

VVIN_OV (23.5V), nIRQ is asserted. This is a level

triggered event.

1 must

be written into

nIRQ_CLEAR to deassert nIRQ. This fault is

detected in both the HIZ state and the POWER

ON state.

VIN UV Fault – If the input voltage at the VINS

pin is below the VIN_UV_OFFSET threshold,

nIRQ is asserted. This is a level triggered event.

VIN must be in the valid range AND 1 must be

written into nIRQ_CLEAR to deassert nIRQ.

10. Light Load Disable State - Any time the IC

enters the LL_DIS state, nIRQ is asserted. This

is an edge triggered event. A 1 must be written

into nIRQ_CLEAR to deassert nIRQ. The IC

does not need to exit the LL_DIS state to

de-assert nIRQ.

11. Hiccup Mode / Vout Fault State - Any time the

IC enters the HICCUP state, nIRQ is asserted.

This is an edge triggered event. A 1 must be

written into nIRQ_CLEAR to deassert nIRQ.

Die Thermal Regulation

The

ACT510x

monitors

the

internal

junction

temperature, TJ, to avoid overheating When TJ exceeds

the maximum thermal regulation limit set by I2C bits

TREG [1:0], the IC reduces the output current to lower

the die temperature. It effectively reduces the output

current limit value. If the load current is not reduced, the

output voltage will drop and generate an undervoltage

fault. The maximum operating junction temperature is

programmable to 80ºC, 100ºC, or 120ºC to allow the

user to optimize their system thermal performance. This

function can be disabled by setting TREG[1:0] = 00.

HIZ Mode

The ACT510x HIZ mode is a low power state where the

buck-boost converter is disabled. The LDO can be

enabled or disabled by I2C bit VREG_EN in register

0x01h. The IC always starts up in HIZ mode before

going to POWER ON mode. If the IC is not enabled, it

stays in the HIZ state indefinitely.

The IC enters HIZ mode from POWER ON mode when

the converter is disabled or if a 1 is written into I2C bit

HIZ in register 0x00h.

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