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HT46R652 датащи(PDF) 27 Page - Holtek Semiconductor Inc |
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HT46R652 датащи(HTML) 27 Page - Holtek Semiconductor Inc |
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27 / 47 page ![]() HT46R652 Rev. 1.00 27 December 19, 2006 C O M 0 , C O M 1 , C O M 2 N o r m a l O p e r a t i o n M o d e D u r i n g a R e s e t P u l s e C O M 0 , C O M 1 , C O M 2 V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S A l l L C D d r i v e r o u t p u t s C O M 0 C O M 1 C O M 2 * H A L T M o d e V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S V L C D 1 / 2 V L C D V S S * * * N o t e : " * " O m i t t h e C O M 2 s i g n a l , i f t h e 1 / 2 d u t y L C D i s u s e d . L C D s e g m e n t s O N C O M 0 , 1 , 2 s i d e s a r e u n l i g h t e d O n l y L C D s e g m e n t s O N C O M 0 s i d e a r e l i g h t e d O n l y L C D s e g m e n t s O N C O M 1 s i d e a r e l i g h t e d O n l y L C D s e g m e n t s O N C O M 2 s i d e a r e l i g h t e d L C D s e g m e n t s O N C O M 0 , 1 s i d e s a r e l i g h t e d L C D s e g m e n t s O N C O M 0 , 2 s i d e s a r e l i g h t e d L C D s e g m e n t s O N C O M 1 , 2 s i d e s a r e l i g h t e d L C D s e g m e n t s O N C O M 0 , 1 , 2 s i d e s a r e l i g h t e d A l l l c d d r i v e r o u t p u t s LCD Driver Output - 1/3 Duty, 1/2 Bias, R/C Type LCD Segments as Logic Outputs The SEG0~SEG23 pins can also can be setup as logic outputs via a configuration options. Once an LCD segment is con- figured as a logic output, the content of bit0 of the related segment address in the LCD RAM will appear on the segment. Pins SEG0~SEG7 and SEG8~SEG15 are together byte optioned as logic outputs, SEG16~SEG23 are individually bit optioned as logic outputs. LCD Type R Type C Type LCD Bias Type 1/2 bias 1/3 bias 1/2 bias 1/3 bias VMAX If VDD>VLCD, then VMAX connect to VDD, else VMAX connect to VLCD If VDD> 3 2 VLCD, then VMAX connect to VDD, else VMAX connect to V1 |
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