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HT46R652 датащи(PDF) 22 Page - Holtek Semiconductor Inc |
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HT46R652 датащи(HTML) 22 Page - Holtek Semiconductor Inc |
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22 / 47 page ![]() HT46R652 Rev. 1.00 22 December 19, 2006 PWM The microcontroller provides a 16-channel PWM output shared with pins PC0~PC7 and PD0~PD7. Its output signals can be configured as (6+2) or (7+1) type de- pendent upon configuration options. Each PWM chan- nel has its own 8-bit data register, denoted as PWM0~PWM15. The PWM frequency source comes from fSYS. Once the PC0~PC7 and PD0~PD7 pins are selected as PWM outputs, if the pins are setup as out- puts, writing a ²1² to the PC0~PC7 and PD0~PD7 data registers will enable the corresponding PWM output function, while writing a ²0² will force the PC0~PC7 and PD0~PD7 pins to remain at ²0². In the (6+2) mode, the PWM cycle is divided into four modulation cycles, modulation cycle 0~modulation cy- cle 3. Each modulation cycle has 64 PWM input clock periods. In the (6+2) mode, the contents of each PWM register is divided into two groups. Group 1 of the PWM register is denoted by a DC which is the value of PWM.7~PWM.2. Group 2 is denoted by AC which is the value of PWM.1~PWM.0. In the (6+2) mode, the duty cycle of each modulation cy- cle is shown in the table. Parameter AC (0~3) Duty Cycle Modulation cycle i (i=0~3) i<AC DC 1 64 + i ³AC DC 64 The (7+1) mode PWM cycle is divided into two modula- tion cycles, modulation cycle0~modulation cycle 1. Each modulation cycle has 128 PWM input clock peri- ods. In the (7+1) mode, the contents of each PWM reg- ister is divided into two groups. Group 1 of the PWM register is denoted by DC which is the value of PWM.7~PWM.1. Group 2 is denoted by AC which is the value of PWM.0. In the (7+1) mode, the duty cycle of each modulation cy- cle is shown in the table. f S Y S / 2 P W M [ P W M ] = 1 0 0 [ P W M ] = 1 0 1 P W M [ P W M ] = 1 0 2 P W M [ P W M ] = 1 0 3 P W M P W M c y c l e : 2 5 6 / f S Y S 2 5 / 6 4 2 6 / 6 4 2 6 / 6 4 2 6 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 5 / 6 4 2 6 / 6 4 2 6 / 6 4 2 5 / 6 4 2 5 / 6 4 2 6 / 6 4 2 5 / 6 4 2 6 / 6 4 2 6 / 6 4 2 6 / 6 4 M o d u l a t i o n c y c l e 0 P W M m o d u l a t i o n p e r i o d : 6 4 / f S Y S M o d u l a t i o n c y c l e 1 M o d u l a t i o n c y c l e 2 M o d u l a t i o n c y c l e 3 M o d u l a t i o n c y c l e 0 (6+2) PWM Mode f S Y S / 2 P W M [ P W M ] = 1 0 0 [ P W M ] = 1 0 1 P W M [ P W M ] = 1 0 2 P W M [ P W M ] = 1 0 3 P W M P W M m o d u l a t i o n p e r i o d : 1 2 8 / f S Y S 5 0 / 1 2 8 5 1 / 1 2 8 5 1 / 1 2 8 5 2 / 1 2 8 5 0 / 1 2 8 5 0 / 1 2 8 5 1 / 1 2 8 5 1 / 1 2 8 5 0 / 1 2 8 5 1 / 1 2 8 5 1 / 1 2 8 5 2 / 1 2 8 M o d u l a t i o n c y c l e 0 P W M c y c l e : 2 5 6 / f S Y S M o d u l a t i o n c y c l e 1 M o d u l a t i o n c y c l e 0 (7+1) PWM Mode |
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