HT46R652 datasheet(19/47 Pages) HOLTEK

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HT46R652

Rev. 1.00

December 19, 2006

timer/event counter and ends at FFFFH. Once an over-

flow occurs, the counter is reloaded from the timer/event

counter preload register, and generates an interrupt re-

quest flag, T0F; bit 6 of INTC0 and T1F; bit 4 of INTC1.

In the pulse width measurement mode with the values of

the T0ON/T1ON and T0E/T1E bits equal to 1, after the

TMR0 or TMR1 pin has received a transient from low to

high, or high to low if the T0E/T1E bit is

²0², it will start

counting until the TMR0 or TMR1 pin returns to its origi-

nal level and resets the T0ON/T1ON bit. The measured

result remains in the timer/event counter even if the acti-

vated transient occurs again. In other words, only a sin-

gle measurement can be made until the T0ON/T1ON is

again set. In this operation mode, the timer/event coun-

ter begins counting, not according to the logic level on

the pins, but according to the transient edges. In the

case of counter overflows, the counter is reloaded from

the timer/event counter register and issues an interrupt

request, as in the other two modes, i.e., event and timer

modes.

Bit No.

Label

Function

T0PSC0

T0PSC1

T0PSC2

To define the prescaler stages.

T0PSC2, T0PSC1, T0PSC0=

000: fINT=fSYS

001: fINT=fSYS/2

010: fINT=fSYS/4

011: fINT=fSYS/8

100: fINT=fSYS/16

101: fINT=fSYS/32

110: fINT=fSYS/64

111: fINT=fSYS/128

T0E

Defines the TMR0 active edge of the timer/event counter:

In Event Counter Mode (T0M1,T0M0)=(0,1):

1: count on falling edge;

0: count on rising edge

In Pulse Width measurement mode (T0M1,T0M0)=(1,1):

1: start counting on the rising edge, stop on the falling edge;

0: start counting on the falling edge, stop on the rising edge

T0ON

Enable/disable timer counting (0=disabled; 1=enabled)

Unused bit, read as

²0²

T0M0

T0M1

Defines the operating mode T0M1, T0M0=

01= Event count mode (External clock)

10= Timer mode (Internal clock)

11= Pulse Width measurement mode (External clock)

00= Unused

TMR0C (0EH) Register

Bit No.

Label

Function

0~2

Unused bit, read as

²0²

T1E

Defines the TMR1 active edge of the timer/event counter:

In Event Counter Mode (T1M1,T1M0)=(0,1):

1: count on falling edge;

0: count on rising edge

In Pulse Width measurement mode (T1M1,T1M0)=(1,1):

1: start counting on the rising edge, stop on the falling edge;

0: start counting on the falling edge, stop on the rising edge

T1ON

Enable/disable timer counting (0= disabled; 1= enabled)

T1S

Defines the TMR1 internal clock source (0=fSYS/4; 1=32768Hz)

T1M0

T1M1

Defines the operating mode T1M1, T1M0=

01= Event count mode (External clock)

10= Timer mode (Internal clock)

11= Pulse Width measurement mode (External clock)

00= Unused

TMR1C (11H) Register

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