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HT46R652 датащи(PDF) 15 Page - Holtek Semiconductor Inc |
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HT46R652 датащи(HTML) 15 Page - Holtek Semiconductor Inc |
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15 / 47 page ![]() HT46R652 Rev. 1.00 15 December 19, 2006 Real Time Clock - RTC The real time clock, RTC, is operated in the same man- ner as the time base in that it is used to supply a regular internal interrupt. Its time-out period ranges from fS/2 8 to fS/2 15, the value being setup using software. Writing data to the RT2, RT1 and RT0 bits in the RTCC register, provides various time-out periods. If an RTC time-out occurs, the related interrupt request flag, RTF; bit 6 of INTC1, is set. But if the interrupt is enabled, and the stack is not full, a subroutine call to location 18H occurs. RT2 RT1 RT0 RTC Clock Divided Factor 000 2 8* 001 2 9* 010 2 10* 011 2 11* 100 2 12 101 2 13 110 2 14 111 2 15 Note: * not recommended to be used Power Down Operation The Power Down mode is entered by the execution of a ²HALT² instruction and results in the following. · The system will cease to run but the WDT oscillator will keep running if the WDT oscillator or the real time clock is selected. · The contents of the Memory and registers remain un- changed. · The WDT will be cleared and starts recounting, if the WDT clock source is sourced from the WDT oscillator or the real time clock oscillator. · All I/O ports maintain their original status. · The PDF flag is set but the TO flag is cleared. · The LCD driver will maintain its function if the WDT OSC or RTC OSC is selected. The system will wake up from the Power Down mode via an external reset, an interrupt, an external falling edge signal on port A or a WDT overflow. An external reset will generate a device initialisation, while a WDT overflow performs a ²warm reset². After examining the TO and PDF flags, the reason for the device reset can be deter- mined. The PDF flag is cleared by a system power-up or by executing the ²CLR WDT² instruction, and is set by executing the ²HALT² instruction. The TO flag is set if a WDT time-out occurs, and causes a wake-up that only resets the Program Counter and the Stack Pointer, but leaves the others in their original state. The port A wake-up and interrupt methods can be con- sidered as a continuation of normal execution. Each bit in port A can be independently selected to wake up the device by a configuration option. If awakened by an I/O port stimulus, the program resumes execution at the next instruction following the ²HALT² instruction. Awak- ening from an interrupt, two sequence may occur. If the related interrupt is disabled or the interrupt is enabled but the stack is full, the program resumes execution at the next instruction. But if the interrupt is enabled, and the stack is not full, a regular interrupt response takes place. When an interrupt request flag is set before entering the Power Down mode, the system cannot be awakened us- ing that interrupt. If a wake-up events occur, it takes 1024 tSYS (system clock periods) to resume normal operation. In other words, a dummy period is inserted after the wake-up. If the wake-up results from an interrupt acknowledgment, the actual interrupt subroutine execution is delayed by more than one cycle. However, if a wake-up results in the next instruction execution, the execution will be per- formed immediately after the dummy period is finished. To minimise power consumption, all the I/O pins should be carefully managed before entering the Power Down mode. Reset There are three ways in which a reset may occur. · RES pin is pulled low during normal operation · RES pin is pulled low when in the Power Down mode · A WDT time-out during normal operation A WDT time-out when the device is in the Power Down mode differs from other device reset conditions, as it will perform a ²warm reset² that resets only the program counter and the SP but leaves the other circuits in their original state. Some registers remain unaffected during other reset conditions. Most registers are reset to their initial condition once the reset conditions are met. By ex- amining the PDF and TO flags, the program can distin- guish between the different types of device resets. D i v i d e r f S 8 t o 1 M u x . P r e s c a l e r R T 2 R T 1 R T 0 R T C I n t e r r u p t 2 8 / f S ~ 2 1 5 / f S Real Time Clock |
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