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PM7367 датащи(PDF) 141 Page - PMC-Sierra, Inc |
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PM7367 датащи(HTML) 141 Page - PMC-Sierra, Inc |
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141 / 323 page ![]() PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 127 Register 0x204 : RHDL Indirect Channel Data Register #1 Bit Type Function Default Bit 31 to Bit 16 Unused XXXXH Bit 15 R/W PROV 0 Bit 14 R/W CRC[1] 0 Bit 13 R/W CRC[0] 0 Bit 12 R/W STRIP 0 Bit 11 R/W DELIN 0 Bit 10 R TAVAIL X Bit 9 Unused X Bit 8 W FPTR[8] X Bit 7 W FPTR[7] X Bit 6 W FPTR[6] X Bit 5 W FPTR[5] X Bit 4 W FPTR[4] X Bit 3 W FPTR[3] X Bit 2 W FPTR[2] X Bit 1 W FPTR[1] X Bit 0 W FPTR[0] X This register contains data read from the channel provision RAM after an indirect read operation or data to be inserted into the channel provision RAM in an indirect write operation. Note This register is not byte addressable. Writing to this register modifies all the bits in the register. Byte selection using byte enable signals (CBEB[3:0]) are not implemented. However, when all four byte enables are negated, no access is made to this register. |
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