PM7367 datasheet(74/323 Pages) PMC

номер детали	PM7367

подробное описание детали	FRAME ENGINE AND DATA LINK MANAGER

PDF	323 Pages

Scroll/Zoom	100%

производитель	PMC [PMC-Sierra, Inc]

домашняя страница	http://www.pmc-sierra.com

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74 / 323 page

PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

Figure 12 – TDRR and TDRF Queues

Transmit Descriptor Referance Queues

TQB[31:2] = Tx Queue Base register

TDRFQS[15:0] = TDR Free Queue Start register

TDRFQW[15:0] = TDR Free Queue Write register

TDRFQR[15:0] = TDR Free Queue Read register

TDRFQE[15:0] = TDR Free Queue End register

Base Address:

Index Registers:

Free:

Ready:

TDRRQS[15:0] = TDR Ready Queue Start register

TDRRQW[15:0] = TDR Ready Queue Write register

TDRRQR[15:0] = TDR Ready Queue Read register

TDRRQE[15:0] = TDR Ready Queue End register

Base Address

+ Index Register

-------------------------

PCI Address

TQB[31:2]

Index[15:0]

AD[31:0]

Tx Descriptor Reference Queue Memory Map

TQB

TDRRQW

Bit 0

Bit 31

TDRFQS

TDRFQE

TDRFQR

TDRFQW

Status + TDR

TDRRQS

TDRRQE

TDRRQR

Valid TDR. Only least

significant 17

bits are valid.

Status + TDR

256KB

TDR Reference Queues

PCI Host Memory

TDR

Status + TDR

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