PM7367 datasheet(26/323 Pages) PMC

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PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

Pin Name

Type

No.

Function

TD[0]

TD[1]

TD[2]

TD[3]

TD[4]

TD[5]

TD[6]

TD[7]

TD[8]

TD[9]

TD[10]

TD[11]

TD[12]

TD[13]

TD[14]

TD[15]

TD[16]

TD[17]

TD[18]

TD[19]

TD[20]

TD[21]

TD[22]

TD[23]

TD[24]

TD[25]

TD[26]

TD[27]

TD[28]

TD[29]

TD[30]

TD[31]

Output

W10

Y10

W11

U11

W12

U12

W13

Y14

Y15

The transmit data signals (TD[31:0])

contains the transmit data for the 32

independently timed links in normal mode

(PMCTEST set low). Processing of the

transmit links is on a priority basis, in

descending order from TD[0] to TD[31].

Therefore, the highest rate link should be

connected to TD[0] and the lowest to

TD[31].

For channelised links, TD[n] contains the 24

(T1) or 31 (E1) time-slots that comprise the

channelised link. TCLK[n] must be gapped

during the T1 framing bit position or the E1

frame alignment signal (time-slot 0). The

FREEDM-32P32 uses the location of the

gap to determine the channel alignment on

TD[n].

For unchannelised links, TD[n] contains the

HDLC packet data. For certain transmission

formats, TD[n] may contain place holder bits

or time-slots. TCLK[n] must be externally

gapped during the place holder positions in

the TD[n] stream. The FREEDM-32P32

supports a maximum data rate of 10 Mbit/s

on an individual TD[31:3] link and a

maximum data rate of 52 Mbit/s on TD[2:0]

TD[31:0] is updated on the falling edge of

the corresponding TCLK[31:0] clock.

TBD

Input

W15

The transmit BERT data signal (TBD)

contains the transmit bit error rate test data.

When the TBERTEN bit in the BERT

Control register is set high, the data on TBD

is transmitted on the selected one of the

transmit data signals (TD[31:0]). TBD is

sampled on the rising edge of TBCLK.

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