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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM69 датащи(PDF) 10 Page - Texas Instruments |
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AM69 датащи(HTML) 10 Page - Texas Instruments |
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10 / 312 page  Figure 5-2 shows the ball locations for the 1063-ball flip chip ball grid array (FCBGA) package to quickly locate signal names and ball grid numbering. This figure is used in conjuction with Table 5-1 through Section 5.4 (Pin Attributes table and all Signal Descriptions tables, including the Pin Connectivity Requirements table). 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 A B C D E F G H J K L M N P R T U V W Y AA AB AC AD AE AF AG AH AJ AK AL AM AN Not to scale VSS VDDS_DDR DDR1_DM0 VSS DDR1_DQ2 DDR1_DQ0 VSS MCU_OSPI1 _CSn0 MCU_OSPI1 _CSn1 MCU_OSPI1 _D3 MCU_OSPI1 _D2 MCU _RGMII1 _TD3 MCU _RGMII1 _TD1 MCU _RGMII1 _TXC WKUP _GPIO0_9 WKUP_I2C0 _SCL WKUP _GPIO0_66 WKUP _GPIO0_67 WKUP _GPIO0_56 WKUP _GPIO0_49 MCU_I2C0 _SDA OSC1_XO VSS WKUP_OSC0 _XI VSS MCU_ADC0 _AIN6 VSS MCU_ADC0 _AIN3 VSS MCU_ADC1 _AIN6 VSS MCU_ADC1 _AIN5 DDR1 _DQS0P DDR1_DQ5 VSS DDR1_DQ4 DDR1_DQ7 VSS MCU_OSPI1 _CLK MCU_OSPI1 _D0 MCU_OSPI1 _DQS MCU_OSPI1 _LBCLKO MCU_OSPI1 _D1 MCU _RGMII1 _TD2 MCU _RGMII1 _TD0 MCU _RGMII1 _TX_CTL WKUP _GPIO0_6 PMIC _POWER _EN1 WKUP _GPIO0_7 WKUP _GPIO0_10 WKUP _GPIO0_8 WKUP _GPIO0_57 WKUP _GPIO0_11 VSS OSC1_XI VSS WKUP_OSC0 _XO VSS MCU_ADC0 _AIN7 VSS MCU_ADC1 _AIN3 VSS MCU_ADC1 _AIN2 VSS MCU_ADC1 _AIN1 DDR1 _DQS0N VSS DDR1_DQ6 DDR1_DQ3 VSS DDR1_DQ1 MCU_OSPI0 _D6 MCU_OSPI0 _D7 MCU_OSPI0 _D5 MCU_OSPI0 _DQS VSS MCU _RGMII1 _RX_CTL VSS MCU _RGMII1 _RXC VSS WKUP _GPIO0_15 VSS MCU_MCAN0 _RX WKUP _UART0 _TXD WKUP _UART0 _RXD VSS MCU _SAFETY _ERRORn VSS MCU_PORz VSS MCU_ADC0 _REFN VSS MCU_ADC1 _AIN7 VSS MCU_ADC1 _REFP VSS MCU_ADC1 _AIN0 VSS VSS DDR1_DQ9 DDR1_DQ14 VSS DDR1_DQ15 DDR1_DQ12 VSS MCU_OSPI0 _CLK MCU_OSPI0 _D4 MCU_OSPI0 _LBCLKO MCU_OSPI0 _D3 MCU _RGMII1 _RD2 MCU _RGMII1 _RD3 MCU _RGMII1 _RD1 WKUP _GPIO0_14 WKUP _GPIO0_1 WKUP _GPIO0_12 WKUP _GPIO0_2 WKUP _GPIO0_3 WKUP _GPIO0_5 WKUP _GPIO0_13 MCU_I2C0 _SCL WKUP_I2C0 _SDA PORz MCU_ADC0 _REFP VSS MCU_ADC0 _AIN5 VSS MCU_ADC1 _REFN VSS MCU_ADC1 _AIN4 VSS MMC1_CLK DDR1 _DQS1P DDR1_DQ10 VSS DDR1_DQ13 DDR1_DQ8 VSS DDR1_CKE0 VSS MCU_OSPI0 _D2 MCU_OSPI0 _D0 MCU_OSPI0 _CSn3 MCU_MDIO0 _MDC MCU _RGMII1 _RD0 MCU_SPI0 _D1 WKUP _GPIO0_0 WKUP _GPIO0_4 EMU1 MCU_SPI0 _D0 MCU_SPI0 _CS0 MCU _RESETz MCU_RESETS TATz MCU_MCAN0 _TX VSS MCU_ADC0 _AIN4 VSS MCU_ADC0 _AIN0 VSS VSS MMC1_DAT2 VSS MMC1_CMD GPIO0_12 DDR1 _DQS1N VSS DDR1_DM1 DDR1_DQ11 VSS DDR1_CSn1 _1 VSS DDR1_CAL0 MCU_OSPI0 _D1 MCU_OSPI0 _CSn2 MCU_OSPI0 _CSn1 MCU_OSPI0 _CSn0 MCU_MDIO0 _MDIO VSS MCU_SPI0 _CLK VSS TRSTn VSS EMU0 VSS TCK VSS MCU_ADC0 _AIN2 VSS MCU_ADC0 _AIN1 VPP_MCU MMC1_DAT0 MMC1_DAT1 MMC1_DAT3 MCASP0 _AXR3 MCASP0 _AXR0 MCAN2_RX VSS DDR1_CA2 DDR1_CA4 VSS DDR1 _RESETn DDR1_CSn0 _0 DDR1_CSn0 _1 DDR1_RET VSS VDDS_DDR VSS VDDS_DDR VSS VDDS_DDR VSS VDDS_DDR VSS VDDS_DDR VSS RESET _REQz VSS VDDSHV1 _MCU VSS VDDSHV2 _MCU VSS VMON1_ER _VSYS VSS MCAN2_TX MCAN0_RX MCAN16_TX MCASP1 _AXR1 MCASP2 _AFSX MCAN1_TX DDR1_CKN VSS DDR1_CA1 DDR1_CA5 VSS DDR1_CKE1 DDR1_CSn1 _0 VSS VDDS_DDR VSS VDDS_DDR VSS VDDS_DDR VSS VDDS_DDR VSS VDDS_DDR VSS VDD_CPU VSS VDD_CPU VSS VDDSHV1 _MCU VSS VDDSHV2 _MCU VSS VDDSHV0 _MCU VSS MCASP1 _AXR0 MCASP0 _AXR5 MCAN1_RX MCASP0 _AXR1 MCASP0 _AXR2 VSS DDR1_CKP DDR1_CA3 DDR1_CA0 DDR1_DQ20 VSS VSS VDDS_DDR VSS VDDS_DDR VDDA_0P8 _PLL_DDR1 VDDS_DDR _C1 VSS VDDS_DDR VSS VDDS_DDR VSS VDD_CPU VSS VDD_CPU VSS VDD_MCU CAP_VDDS1 _MCU CAP_VDDS2 _MCU CAP_VDDS0 _MCU VDD_MCU _WAKE1 VDDA_WKUP VDDA_ADC0 MCASP0 _ACLKX MCASP1 _AXR2 MCASP0 _AXR4 EXT _REFCLK1 DDR1 _DQS2N VSS DDR1_DQ21 DDR1_DQ17 VSS DDR1_DQ23 VDDS_DDR VSS VDD_CORE VDDA _TEMP1 VDD_CORE VSS VDDA _PLLGRP8 VSS VDD_CORE VSS VDD_CORE VSS VDDAR_CPU VSS VDD_MCU VSS VDD_MCU VDDA_MCU _TEMP VDDAR_MCU VDDA_MCU _PLLGRP0 VSS VDDA_ADC1 VSS VMON3_IR _VEXT1P8 MCASP0 _AFSX MCASP2 _AXR0 MCASP0 _AXR6 DDR1 _DQS2P DDR1_DM2 VSS DDR1_DQ22 DDR1_DQ19 VSS VSS VDDS_DDR VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CPU VSS VDD_CPU VDDAR_CPU VDDAR_MCU VSS VDD_MCU VMON2_IR _VCPU VDDA_POR _WKUP VDDA_OSC1 ECAP0_IN _APWM_OUT MCASP0 _AXR10 MCASP0 _AXR13 VSS DDR1_DQ18 DDR1_DQ16 VSS DDR1_DQ27 DDR1_DQ28 VDDS_DDR VSS VDD_CORE VDDA _PLLGRP7 VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CPU VSS VDD_MCU VSS VDD_MCU VSS VDD_MCU VMON4_IR _VEXT1P8 CAP_VDDS5 VSS VMON5_IR _VEXT3P3 MCASP0 _AXR7 MCASP0 _AXR12 MCASP0 _AXR15 DDR1 _DQS3N VSS DDR1_DQ26 DDR1_DQ30 VSS DDR1_DQ24 VSS VDDS_DDR _C0 VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CPU VDDA _PLLGRP6 VDD_CPU VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VDDSHV5 VDDSHV2 VSS MCASP0 _AXR8 MCASP1 _AXR4 MCASP1 _AFSX MCAN0_TX DDR1 _DQS3P DDR1_DM3 VSS DDR1_DQ25 DDR1_DQ29 DDR1_DQ31 VDDS_DDR VDDA_0P8 _PLL_DDR0 VDD_CORE VSS VDD_CORE VSS VDDAR_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDDAR _CORE VSS VDD_CORE VSS CAP_VDDS2 VDDSHV2 MCAN12_TX MCASP0 _AXR11 MCASP1 _AXR3 GPIO0_11 MCASP2 _ACLKX DDR0 _DQS0P DDR0_DQ2 VSS DDR0_DQ1 DDR0_DQ0 VSS DDR0_CAL0 VDDS_DDR VSS VDD_CORE VSS VDD_CPU VSS VDDAR_CPU VSS VDD_CPU VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VDD_WAKE0 VSS MCAN15_TX MCAN14_RX MCAN15_RX MCASP2 _AXR1 MCAN14_TX DDR0 _DQS0N VSS DDR0_DQ5 DDR0_DQ3 VSS DDR0_DQ6 DDR0_DQ7 VSS VDD_CPU VSS VDD_CPU VDDA _PLLGRP5 VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CORE VSS VDD_CORE VSS CAP_VDDS0 VDDSHV0 MCAN12_RX PMIC _WAKE0n MCAN13_TX MCAN13_RX MCASP0 _AXR9 VSS DDR0_DQ13 DDR0_DQ15 VSS DDR0_DQ4 DDR0_DM0 VSS VDD_CPU VSS VDD_CPU VSS VDDAR_CPU VSS VDD_CPU VDDAR_CPU VDD_CPU VDDA _TEMP2 VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS MCAN16_RX MCASP0 _AXR14 MCASP1 _ACLKX VSS DDR0 _DQS1P DDR0_DM1 VSS DDR0_DQ8 DDR0_DQ11 VSS DDR0_DQ9 VSS VDDAR_CPU VSS VDD_CPU VSS VDDAR_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CORE VDDA _PLLGRP9 VDDA _PLLGRP1 VDDA _TEMP0 VDD_CORE VSS VPP_CORE SPI0_D0 SPI0_CLK TMS TDI DDR0 _DQS1N VSS DDR0_DQ10 DDR0_DQ14 VSS DDR0_DQ12 DDR0 _RESETn VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VDDA _PLLGRP12 VDD_CORE VSS VDD_CORE VDDA _PLLGRP0 VDD_CORE VSS VDD_CORE VSS TIMER_IO1 SPI0_D1 RESETSTA Tz TDO VSS DDR0_CKN DDR0_CA4 DDR0_CA1 DDR0_CSn0 _1 VSS DDR0_CSn1 _0 VSS VDD_CPU VSS VDDAR_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CORE VDDA _PLLGRP13 VDDAR _CORE VSS VDD_CORE VSS EXTINTn I2C0_SDA SOC _SAFETY _ERRORn SPI0_CS1 SPI0_CS0 DDR0_CKP VSS DDR0_CA0 DDR0_CA2 VSS DDR0_CSn0 _0 DDR0_CSn1 _1 VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDDAR_CPU VSS VDDAR_CPU VSS VDDAR_CPU VSS VDD_CPU VSS VDDAR _CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS I2C0_SCL VSS TIMER_IO0 VSS VSS DDR0_DQ19 DDR0_CA3 VSS DDR0_CA5 DDR0_CKE0 DDR0_CKE1 VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VDDA _TEMP4 VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS CSI2 _RXCLKP VSS CSI2_RXN1 VSS CSI2_RXN3 DDR0 _DQS2N VSS DDR0_DQ17 DDR0_DQ20 VSS DDR0_DQ22 DDR0_RET VDD_CPU VSS VDDAR_CPU VDDA _TEMP3 VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CPU VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE CSI2 _RXCLKN CSI2_RXN0 CSI2_RXP1 CSI2_RXN2 CSI2_RXP3 DDR0 _DQS2P DDR0_DQ21 VSS DDR0_DQ23 DDR0_DQ16 VSS VDDA_0P8 _DLL_MMC0 VSS VDD_CPU VSS VDD_CORE VSS VDDAR _CORE VSS VDD_CORE VDDAR _CORE VDD_CORE VSS VDDAR _CORE VDDA _PLLGRP10 VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VSS CSI2_RXP0 VSS CSI2_RXP2 VSS VSS DDR0_DM2 DDR0_DQ18 VSS DDR0_DQ27 DDR0_DQ28 VSS VDDS_MMC0 VDDAR _CORE VDD_CORE VDDA _PLLGRP2 VDD_CORE VSS VDD_CORE VDDA_0P8 _SERDES _C4 VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDD_CORE VSS VDDAR _CORE VSS VDD_CORE CSI1 _RXCLKN VSS CSI1_RXN2 VSS CSI1_RXN1 DDR0 _DQS3N VSS DDR0_DQ26 DDR0_DQ30 VSS DDR0_DM3 VDDS_MMC0 VSS VDDA_0P8 _UFS VDDA_0P8 _SERDES _C0_1 VSS VDDA_0P8 _SERDES0 _1 VDDA_0P8 _SERDES _C0_1 VSS VDDA_1P8 _SERDES4 VDDA_0P8 _SERDES _C4 VDDA_3P3 _USB VSS VDD_CORE VSS VSS VDDA_1P8 _DSITX VDDA_1P8 _DSITX VSS VDDA_1P8 _CSIRX0_1 VDDA_1P8 _CSIRX0_1 VDDA_1P8 _CSIRX2 VSS CSI1 _RXCLKP CSI1_RXN0 CSI1_RXP2 CSI1_RXN3 CSI1_RXP1 DDR0 _DQS3P DDR0_DQ25 VSS DDR0_DQ24 DDR0_DQ29 VSS SERDES0 _REXT VDDA_1P8 _UFS VSS VDDA_0P8 _SERDES0 _1 VDDA_1P8 _SERDES0 _1 VDDA_1P8 _SERDES0 _1 VDDA_0P8 _SERDES0 _1 VSS VDDA_0P8 _SERDES4 VDDA_0P8 _SERDES4 VDDA_0P8 _USB VSS USB0_VBUS VSS VDDA_1P8 _SERDES2 _4 VDDA_0P8 _DSITX VDDA_0P8 _DSITX_C VDDA_0P8 _CSIRX0_1 VSS VDDA_0P8 _CSIRX2 VDDA_1P8 _CSIRX2 VSS VSS CSI1_RXP0 VSS CSI1_RXP3 VSS VDDS_DDR MMC0 _CALPAD MMC0_DAT5 VSS DDR0_DQ31 SERDES1 _REXT PCIE _REFCLK2 _P_OUT PCIE _REFCLK2 _N_OUT VSS PCIE _REFCLK1 _P_OUT PCIE _REFCLK1 _N_OUT VSS USB0_DM USB0_DP VSS VDDA_1P8 _USB USB0_ID VSS USB0 _RCALIB SERDES4 _REXT VSS DSI0 _TXRCALIB VSS DSI1 _TXRCALIB VSS CSI2 _RXRCALIB VSS CSI0 _RXRCALIB CSI0 _RXCLKP CSI0 _RXCLKN MMC0_DS MMC0_CLK MMC0_DAT4 MMC0_DAT6 UFS0_REF _CLK VSS UFS0_RSTn VSS SERDES1 _TX3_N SERDES1 _TX3_P VSS PCIE _REFCLK0 _P_OUT PCIE _REFCLK0 _N_OUT VSS PCIE _REFCLK3 _P_OUT PCIE _REFCLK3 _N_OUT VSS SERDES0 _TX1_P SERDES0 _TX1_N VSS SERDES4 _TX0_N SERDES4 _TX0_P VSS DP0_AUXP DP0_AUXN VSS DSI0 _TXCLKP DSI0 _TXCLKN VSS DSI1 _TXCLKP DSI1 _TXCLKN VSS CSI1 _RXRCALIB MMC0_DAT3 MMC0_DAT7 MMC0_DAT1 VSS UFS0_RX _DN0 UFS0_RX _DP0 VSS SERDES1 _TX2_N SERDES1 _TX2_P VSS SERDES1 _TX0_N SERDES1 _TX0_P VSS SERDES0 _REFCLK_P SERDES0 _REFCLK_N VSS SERDES0 _TX3_P SERDES0 _TX3_N VSS SERDES4 _REFCLK_P SERDES4 _REFCLK_N VSS SERDES4 _RX2_N SERDES4 _RX2_P VSS DSI0_TXP1 DSI0_TXN1 VSS DSI1_TXP0 DSI1_TXN0 VSS CSI0_RXP3 CSI0_RXN3 MMC0_DAT2 MMC0_CMD VSS UFS0_RX _DN1 UFS0_RX _DP1 VSS SERDES1 _RX3_N SERDES1 _RX3_P VSS SERDES1 _RX0_N SERDES1 _RX0_P VSS SERDES0 _RX1_N SERDES0 _RX1_P VSS SERDES0 _RX3_P SERDES0 _RX3_N VSS SERDES4 _RX1_N SERDES4 _RX1_P VSS SERDES4 _TX3_N SERDES4 _TX3_P VSS DSI0_TXP0 DSI0_TXN0 VSS DSI1_TXP1 DSI1_TXN1 VSS CSI0_RXP0 CSI0_RXN0 VSS MMC0_DAT0 VSS UFS0_TX _DN1 UFS0_TX _DP1 VSS SERDES1 _RX2_N SERDES1 _RX2_P VSS SERDES1 _TX1_N SERDES1 _TX1_P VSS SERDES0 _RX0_N SERDES0 _RX0_P VSS SERDES0 _TX2_P SERDES0 _TX2_N VSS SERDES4 _TX1_N SERDES4 _TX1_P VSS SERDES4 _RX3_N SERDES4 _RX3_P VSS DSI0_TXP2 DSI0_TXN2 VSS DSI1_TXP2 DSI1_TXN2 VSS CSI0_RXP1 CSI0_RXN1 VSS VSS VSS UFS0_TX _DN0 UFS0_TX _DP0 VSS SERDES1 _REFCLK_N SERDES1 _REFCLK_P VSS SERDES1 _RX1_N SERDES1 _RX1_P VSS SERDES0 _TX0_N SERDES0 _TX0_P VSS SERDES0 _RX2_P SERDES0 _RX2_N VSS SERDES4 _RX0_N SERDES4 _RX0_P VSS SERDES4 _TX2_N SERDES4 _TX2_P VSS DSI0_TXP3 DSI0_TXN3 VSS DSI1_TXP3 DSI1_TXN3 VSS CSI0_RXP2 CSI0_RXN2 VSS VSS Figure 5-2. AND FCBGA-N1063 Pin Diagram (Top View) 5.2 Pin Attributes 1. Ball Number: Ball numbers assigned to each terminal of the Ball Grid Array package. 2. Ball Name: Ball name assigned to each terminal of the Ball Grid Array package (this name is typically taken from the primary MUXMODE 0 signal function). 3. Signal Name: Signal name of all dedicated and pin multiplexed signal functions associated with a ball. AM69A, AM69 SPRSP92C – FEBRUARY 2023 – REVISED JUNE 2024 www.ti.com 10 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: AM69A AM69 |
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