HT45F0057 datasheet(66/88 Pages) HOLTEK

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HT45F0057

Induction Cooker Flash MCU

HT45F0057

Induction Cooker Flash MCU

For the Timer/Event Counter 1 interrupt to occur, the global interrupt enable bit, EMI, the relevant

Multi-function Interrupt enable bit, MFE and the corresponding timer interrupt enable bit, T1E,

must first be set. An actual Timer/Event Counter interrupt will take place when the Timer/Event

Counter request flag, T1F, is set, a situation that will occur when the relevant Timer/Event Counter

overflows. When the interrupt is enabled, the stack is not full and a Timer/Event Counter 1 overflow

occurs, a subroutine call to the relevant timer interrupt vector, will take place. When the interrupt

is serviced, the EMI bit will be automatically cleared to disable other interrupts. however only the

related MFF flag will be automatically cleared. As the Timer/Event Counter 1 interrupt request flag

will not be automatically cleared, it has to be cleared by the application program.

Comparator Interrupt

The comparator interrupt is controlled by three internal comparators. The comparator 1 is an

independent interrupt and the comparator 2/3 is contained within the Multi-function Interrupt.

The comparator 1 interrupt request will take place when the comparator 1 interrupt request flag,

CP1F is set, a situation that will occur when the comparator output bit changes state. To allow the

program to branch to its respective interrupt vector address, the global interrupt enable bit, EMI, and

comparator interrupt enable bit, CP1E, must first be set. When the interrupt is enabled, the stack is

not full and the comparator 1 input generate a comparator output transition, a subroutine call to the

comparator interrupt vector, will take place. When the interrupt is serviced, the comparator interrupt

request flag, will be automatically reset and the EMI bit will be automatically cleared to disable

other interrupts.

The comparator 2/3 interrupt request will take place when the comparator 2/3 interrupt request flags,

CP2F or CP3F, are set, a situation that will occur when the comparator output bit changes state. To

allow the program to branch to its respective interrupt vector address, the global interrupt enable

bit, EMI, the relevant Multi-function Interrupt enable bit, MFE and comparator interrupt enable

bits, CP2E and CP3E, must first be set. When the interrupt is enabled, the stack is not full and the

comparator inputs generate a comparator output transition, a subroutine call to the comparator

interrupt vector, will take place. When the interrupt is serviced, the EMI bit will be automatically

cleared to disable other interrupts. however only the related MFF flag will be automatically cleared.

As the comparator 2/3 interrupt request flag will not be automatically cleared, it has to be cleared by

the application program.

Interrupt Wake-up Function

Each of the interrupt functions has the capability of waking up the microcontroller when in the

Power down Mode. A wake-up is generated when an interrupt request flag changes from low to high

and is independent of whether the interrupt is enabled or not. Therefore, even though the device is in

the Power down Mode and its system oscillator stopped, situations such as external edge transitions

on the external interrupt pin, a low power supply voltage may cause their respective interrupt flag

to be set high and consequently generate an interrupt. Care must therefore be taken if spurious

wake-up situations are to be avoided. If an interrupt wake-up function is to be disabled then the

corresponding interrupt request flag should be set high before the device enters the Power down

Mode. The interrupt enable bits have no effect on the interrupt wake-up function.

Programming Considerations

By disabling the relevant interrupt enable bits, a requested interrupt can be prevented from being

serviced, however, once an interrupt request flag is set, it will remain in this condition in the

interrupt register until the corresponding interrupt is serviced or until the request flag is cleared by

the application program.

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