 |
поискавой системы для электроныых деталей |
|
|
поискавой системы для электроныых деталей |
|
PIC16F631 датащи(PDF) 176 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC16F631 датащи(HTML) 176 Page - Microchip Technology |
|
|
176 / 294 page  PIC16F631/677/685/687/689/690 DS41262D-page 174 © 2007 Microchip Technology Inc. 12.4.2.3 EUSART Synchronous Slave Reception The operation of the Synchronous Master and Slave modes is identical (Section 12.4.1.5 “Synchronous Master Reception”), with the following exceptions: • Sleep • CREN bit is always set, therefore the receiver is never Idle • SREN bit, which is a “don't care” in Slave mode A character may be received while in Sleep mode by setting the CREN bit prior to entering Sleep. Once the word is received, the RSR register will transfer the data to the RCREG register. If the RCIE enable bit is set, the interrupt generated will wake the device from Sleep and execute the next instruction. If the GIE bit is also set, the program will branch to the interrupt vector. 12.4.2.4 Synchronous Slave Reception Set-up: 1. Set the SYNC and SPEN bits and clear the CSRC bit. 2. If using interrupts, ensure that the GIE and PEIE bits of the INTCON register are set and set the RCIE bit. 3. If 9-bit reception is desired, set the RX9 bit. 4. Set the CREN bit to enable reception. 5. The RCIF bit will be set when reception is complete. An interrupt will be generated if the RCIE bit was set. 6. If 9-bit mode is enabled, retrieve the Most Significant bit from the RX9D bit of the RCSTA register. 7. Retrieve the 8 Least Significant bits from the receive FIFO by reading the RCREG register. 8. If an overrun error occurs, clear the error by either clearing the CREN bit of the RCSTA register or by clearing the SPEN bit which resets the EUSART. TABLE 12-10: REGISTERS ASSOCIATED WITH SYNCHRONOUS SLAVE RECEPTION Name Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0 Value on POR, BOR Value on all other Resets BAUDCTL ABDOVF RCIDL —SCKP BRG16 — WUE ABDEN 01-0 0-00 01-0 0-00 INTCON GIE PEIE T0IE INTE RABIE T0IF INTF RABIF 0000 000x 0000 000x PIE1 — ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE -000 0000 -000 0000 PIR1 — ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF -000 0000 -000 0000 RCREG EUSART Receive Data Register 0000 0000 0000 0000 RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x SPBRG BRG7 BRG6 BRG5 BRG4 BRG3 BRG2 BRG1 BRG0 0000 0000 0000 0000 SPBRGH BRG15 BRG14 BRG13 BRG12 BRG11 BRG10 BRG9 BRG8 0000 0000 0000 0000 TRISB TRISB7 TRISB6 TRISB5 TRISB4 1111 ---- 1111 ---- TXREG EUSART Transmit Data Register 0000 0000 0000 0000 TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010 Legend: x = unknown, – = unimplemented read as ‘0’. Shaded cells are not used for Synchronous Slave Reception. |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Russian ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
