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ADA4945-1ACPZ-R7 датащи(PDF) 52 Page - Analog Devices

номер детали ADA4945-1ACPZ-R7
подробное описание детали  High Speed, ±0.1 μV/˚C Offset Drift, Fully Differential ADC Driver
PDF  57 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
Logo AD - Analog Devices

ADA4945-1ACPZ-R7 датащи(HTML) 52 Page - Analog Devices

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Data Sheet
ADA4945-1
analog.com
Rev. A
52 of 57
Figure 111. Series Resistance vs. Load Capacitance
Figure 112. Series Resistance with a Capacitive Load Test Circuit
Output Clamps
The ADA4945-1 implements output voltage clamps to effectively limit the differential and common-mode signal
levels, thereby protecting circuitry following the ADA4945-1 from being overdriven. The operation of these clamps is
discussed in the Theory of Operation section. Figure 113 shows an example where the output voltage clamp may be
used while driving an ADC. In this example, the ADA4945-1 is operating from +7 V and −2 V supplies, and the ADC is
using +5 V reference. In such a scenario, the ADC input can potentially be overdriven if no clamping were present. By
connecting the clamps to the positive and negative references of the ADC, the differential and common-mode signal
levels are limited as shown in Figure 114 and Figure 115. Note that the differential signals are clamped ~500 mV
beyond the clamp set voltage to allow full swing to the references. The common-mode signal is clamped right at the
clamp set voltages.
Figure 113. ADA4945-1 Output Voltage Clamp Usage
35
0
10
100
1000
5
10
15
20
30
LOAD CAPACITANCE (pF)
25
FULL POWER MODE
LOW POWER MODE
+IN
–OUT
+OUT
–FB
+FB
–IN
VOCM
0.1µF
RS
RS
R1
CL
CL
R2
R4
+5V
–5V
R3
VIN
ADA4945-1
C
R
R
+7V
–2V
RF
RG
RF
+2.5V
C
ADC
–IN
+IN
VREF
REF
+VCLAMP
+5V
–VCLAMP
RG



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