ADA4945-1ACPZ-R7 datasheet(47/57 Pages) AD

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Data Sheet

ADA4945-1

analog.com

Rev. A

47 of 57

Note that the output noise from VOCM goes to zero in this case. The total differential output noise density, vnOD, is the

root-sum square of the individual output noise terms

vnOD = √∑ v2nOi

i=1

Table 13.Output Noise Voltage Density Calculations

Input Noise Contribution Input Noise Term

Input Noise

Voltage

Density

Output

Multiplication

Factor

Output-Referred Noise

Voltage Density Term

Differential Input

vnIN

vnO1 = GN (vnIN)

Inverting Input

inIN−

inIN− × (RG2||RF2)

vnO2 = GN [inIN− × (RG2||RF2)]

Noninverting Input

inIN+

inIN+ × (RG1||RF1)

vnO3 = GN [inIN+ × (RG1||RF1)]

VOCM Input

vnCM

GN (β1 − β2)

vnO4 = GN (β1 − β2)(vnCM)

Gain Resistor, RG1

vnRG1

(4kTRG1)1/2

GN (1 − β2)

vnO5 = GN (1 − β2)(4kTRG1)1/2

Gain Resistor, RG2

vnRG2

(4kTRG2)1/2

GN (1 − β1)

vnO6 = GN (1 − β1)(4kTRG2)1/2

Feedback Resistor, RF1

vnRF1

(4kTRF1)1/2

vnO7 = (4kTRF1)1/2

Feedback Resistor, RF2

vnRF2

(4kTRF2)1/2

vnO8 = (4kTRF2)1/2

Impact of Mismatches in the Feedback Networks

Even if the external feedback networks (RF/RG) are mismatched, the internal common-mode feedback loop still forces

the outputs to remain balanced. The amplitudes of the signals at each output remain equal and 180° out of phase.

The input-to-output, differential mode gain varies proportionately to the feedback mismatch, but the output balance

is unaffected.

As well as causing a noise contribution from VOCM, ratio matching errors in the external resistors result in a

degradation of the ability of the circuit to reject input common-mode signals, similar to a four resistors difference

amplifier made from a conventional op amp.

In addition, if the dc levels of the input and output common mode voltages are different, matching errors result in a

small differential mode, output offset voltage. When G = 1, with a ground referenced input signal and the output

common-mode level set to 2.5 V, an output offset of as much as 25 mV (1% of the difference in common-mode levels)

can result if 1% tolerance resistors are used. Resistors of 1% tolerance result in a worst case input CMRR of about 40

dB, a worst case differential mode output offset of 25 mV due to the 2.5 V level shift, and no significant degradation

in output balance error.

Calculating the Input Impedance of an Application Circuit

The effective input impedance depends on whether the signal source is single-ended or differential. For a balanced

differential input signal, as shown in Figure 103, the input impedance (RIN, dm) between the inputs (+DIN and −DIN) is

RIN,dm = 2 × RG.

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