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LTC2415-1IGN датащи(PDF) 16 Page - Linear Technology |
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LTC2415-1IGN датащи(HTML) 16 Page - Linear Technology |
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16 / 40 page ![]() LTC2415/LTC2415-1 16 sn2415 24151fs APPLICATIO S I FOR ATIO Frequency Rejection Selection LTC2415 (FO) The LTC2415 internal oscillator provides better than 110dB normal mode rejection at the line frequency and its harmon- ics for 50Hz ±2% or 60Hz ±2%. For 60Hz rejection, FO should be connected to GND while for 50Hz rejection the FO pin should be connected to VCC. The selection of 50Hz or 60Hz rejection can also be made by driving FO to an appropriate logic level. A selection change during the sleep or data output states will not disturb the converter operation. If the selection is made during the conversion state, the result of the conversion in progress may be outside specifications but the following conver- sions will not be affected. When a fundamental rejection frequency different from 50Hz or 60Hz is required or when the converter must be synchronized with an outside source, the LTC2415 can operate with an external conversion clock. The converter automatically detects the presence of an external clock signal at the FO pin and turns off the internal oscillator. The frequency fEOSC of the external signal must be at least 2560Hz (1Hz notch frequency) to be detected. The external clock signal duty cycle is not significant as long as the minimum and maximum specifications for the high and low periods tHEO and tLEO are observed. While operating with an external conversion clock of a frequency fEOSC, the LTC2415 provides better than 110dB normal mode rejection in a frequency range fEOSC/2560 ±4% and its harmonics. The normal mode rejection as a function of the input frequency deviation from fEOSC/2560 is shown in Figure 7a. Whenever an external clock is not present at the FO pin, the converter automatically activates its internal oscillator and enters the Internal Conversion Clock mode. The LTC2415 operation will not be disturbed if the change of conversion clock source occurs during the sleep state or during the data output state while the converter uses an external serial clock. If the change occurs during the conversion state, the result of the conversion in progress may be outside speci- fications but the following conversions will not be affected. If the change occurs during the data output state and the converter is in the Internal SCK mode, the serial clock duty cycle may be affected but the serial data stream will remain valid. Table 3a summarizes the duration of each state and the achievable output data rate as a function of FO. Frequency Rejection Selection LTC2415-1 (FO) The LTC2415-1 internal oscillator provides better than 87dB normal mode rejection over the range of 49Hz to 61.2Hz as shown in Figure 7b. For simultaneous 50Hz/60Hz rejection, FO should be connected to GND. In order to achieve 87dB normal mode rejection of 50Hz ±2% and 60Hz ±2%, two consecutive conversions must be averaged. By performing a continuous running average of the two most current results, both simultaneous rejection is achieved and a 2 × increase in throughput is realized relative to the LTC2413 (see Normal Mode Rejection, Ouput Rate and Running Averages sections of this data sheet). When a fundamental rejection frequency different from the range 49Hz to 61.2Hz is required or when the converter must be synchronized with an outside source, the LTC2415-1 can operate with an external conversion clock. The converter automatically detects the presence of an external clock signal at the FO pin and turns off the internal oscillator. The frequency fEOSC of the external signal must be at least 2560Hz to be detected. The external clock signal duty cycle is not significant as long as the minimum and maximum specifications for the high and low periods, tHEO and tLEO, are observed. While operating with an external conversion clock of a frequency fEOSC, the LTC2415-1 provides better than 110dB normal mode rejection in a frequency range fEOSC/ 2560 ±4%. The normal mode rejection as a function of the input frequency deviation from fEOSC/2560 is shown in Figure 7a and Figure 7c shows the normal mode rejection with running averages included. Whenever an external clock is not present at the FO pin the converter automatically activates its internal oscillator and enters the Internal Conversion Clock mode. The LTC2415-1 operation will not be disturbed if the change of conversion clock source occurs during the sleep state or during the data output state while the converter uses an external serial clock. If the change occurs during the conversion state, the result of the conversion in progress may be outside specifications but the following conversions will not be affected. If the change occurs during the data output |
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