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SC26C92 датащи(PDF) 24 Page - NXP Semiconductors |
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SC26C92 датащи(HTML) 24 Page - NXP Semiconductors |
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24 / 31 page ![]() Philips Semiconductors Product specification SC26C92 Dual universal asynchronous receiver/transmitter (DUART) 2000 Jan 31 24 NOTES: 1. INTRN or OP3-OP7 when used as interrupt outputs. 2. The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from the midpoint of the switching signal, VM, to a point 0.5V above VOL. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and test environment are pronounced and can greatly affect the resultant measurement. VM VOL +0.5V VOL WRN INTERRUPT1 OUTPUT tIR VM VOL +0.5V VOL RDN INTERRUPT1 OUTPUT tIR SD00136 Figure 6. Interrupt Timing C1 = C2 ∼ 24pF FOR CL = 20pF tCLK tCTC tRx tTx X1/CLK CTCLK RxC TxC tCLK tCTC tRx tTx +5V 470 Ω X1 X2* CLK *NOTE: X2 MUST BE LEFT OPEN. X2 3.6864MHz X1 C1 C2 SC26C92 NOTE: RESISTOR REQUIRED FOR TTL INPUT. TO UART CIRCUIT 50k Ω to 100k Ω 3pF 3pF C1 and C2 should be chosen according to the crystal manufacturer’s specification. C1 and C2 values will include any parasitic capacitance of the wiring and X1 X2 pins. Gain at 3.6864MHz: 9 to 13 dB Phase at 3.6864MHz: 272 to 276 degrees. 2pF 4pF Package capacitance approximately 4pF. SD00697 Figure 7. Clock Timing |
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