IA186EM-PQF100I-R datasheet(88/133 Pages) INNOVASIC

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IA186EM/IA188EM

Data Sheet

8/16-BIT Microcontrollers

As of Production Version -03

Segment Override Prefix

The Operand Address byte is configured as follows.

Segment Register

Notation

Parameter

Indication

The component of the left is the segment for a component located in

memory. The component on the right is the offset.

The component of the left is concatenated with the component on the right.

Operand

Translation

imm8

Immediate byte: signed number between –128 and 127

imm16

Immediate word: signed number between –32768 and 32767

Operand in memory

Byte string in memory pointed to by DS:SI or ES:DI

m16

Word string in memory pointed to by DS:SI or ES:DI

r/m8

General byte register or a byte in memory

r/m16

General word register or a word in memory

Opcode

Parameter

/0 - /7

The Auxiliary Field in the Operand Address byte specifies an extension (from 000 to 111,

i.e. 0 to 7) to the opcode instead of a register. Thus the opcode for adding (AND) an

immediate byte to a general byte register or a byte in memory is ‘80 /4 ib’. This indicates

that the second byte of the opcode is ‘mod 100 r/m’.

The Auxiliary Field in the Operand Address byte specifies a register rather that an opcode

extension. The opcode byte specifies which register, either byte size or word size, is

assigned as in the aux code above.

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