PCD3316 datasheet(4/30 Pages) PHILIPS

4 / 30 page

Philips Semiconductors

PCD3316

CIDCW receiver

Product speciﬁcation

11 March 1999

4 of 30

9397 750 04824

6.2 Pin description

Functional description

7.1 Preprocessor and analog inputs

The preprocessor for the CAS detection and the FSK receiver incorporates an

Analog-to-Digital Converter (ADC) and a digital bandpass ﬁlter.

The LOWBAT input of the PCD3316 can be used for low battery detection. The

voltage on the LOWBAT pin is compared with an internal voltage reference circuit.

When the LOWBAT voltage drops below the reference voltage, the Status register,

bit 5 is set to logic 1.

The PCD3316 can be forced in a Power-down state by switching off the 3.58 MHz

system clock and the ADC. This is done by setting Mode register 2, bit 7 (CIDMD2.7)

to logic 0. To guarantee correct operation the following order of actions must be

performed (see also Section 7.8 about interrupts):

1. Switch off CAS and FSK detection (if turned on)

2. Read the interrupt register (thus clearing pending interrupts generated by the

CAS and FSK detector)

3. Switch off the 3.58 MHz oscillator by clearing bit 7 of Mode register 2.

The two low power comparators (inputs POL0 and POL1) and the 32.768 kHz clock

are always active.

Table 2:

Pin description

Symbol

I/O

Description

HXIN

3.58 MHz crystal oscillator input

HXOUT

3.58 MHz crystal oscillator output

IRQ

interrupt output; programmable active HIGH or active LOW

SCL

serial clock line of I2C-bus

SDA

I/O

serial data line of I2C-bus

LXIN

32.768 kHz crystal oscillator input

LXOUT

32.768 kHz crystal oscillator output

DGND

−

digital ground

AGND

−

analog ground

POL1

polarity detector input 1

POL0

polarity detector input 0

LOWBAT

low battery detector input

CASIN

input pin for CAS signal

FSKIN

−

negative input for FSK signal

FSKIN+

positive input for FSK signal

VDD

−

supply

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