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PCD3316 датащи(PDF) 17 Page - NXP Semiconductors

номер детали PCD3316
подробное описание детали  Caller-ID on Call Waiting CIDCW receiver
PDF  30 Pages
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производитель  PHILIPS [NXP Semiconductors]
домашняя страница  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

PCD3316 датащи(HTML) 17 Page - NXP Semiconductors

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Philips Semiconductors
PCD3316
CIDCW receiver
Product specification
11 March 1999
17 of 30
9397 750 04824
© Philips Electronics N.V. 1999. All rights reserved.
7.13.5
Mode register 1 (CIDMD1)
7.13.6
Mode register 2 (CIDMD2)
Table 13: Mode register 1
Address: 04H; read/write.
7
6
5
4
3
2
1
0
FSK on/off
FSK-BOM-mask on/off
CAS on/off
POL on/off
INT polarity HIGH/LOW
−−−
Table 14: Description of CIDMD1 bits
Bit
Symbol
Description
CIDMD1.7
FSK on/off
FSK on/off = 0: FSK receiver disabled; FSK on/off = 1: FSK receiver enabled
CIDMD1.6
FSK-BOM-mask on/off
FSK-BOM-mask on/off = 0: FSK interrupts will be generated when a data word was
received even before mark period (data from channel seizure);
FSK-BOM-mask on/off = 1: FSK interrupts will only be generated after the mark
period was detected (no interrupts from channel seizure)
CIDMD1.5
CAS on/off
CAS on/off = 0: CAS detector disabled; CAS on/off = 1: CAS detector enabled
CIDMD1.4
POL on/off
POL on/off = 0: disable interrupts due to polarity change;
POL on/off = 1: enable interrupts due to polarity change
CIDMD1.3
INT polarity HIGH/LOW INT polarity HIGH/LOW = 0: interrupt pin active LOW;
INT polarity HIGH/LOW = 1: interrupt pin active HIGH
CIDMD1.2 to
CIDMD1.0
reserved bits
Table 15: Mode register 2
Address: 05H; read/write.
7
6
5
4
3
2
1
0
XTAL on/off
TB on/off
SEC/MIN
INT-SUP on/off
−−−−
Table 16: Description of CIDMD2 bits
Bit
Symbol
Description
CIDMD2.7
XTAL on/off
XTAL on/off = 0: disable 3.58 MHz oscillator;
XTAL on/off = 1: enable 3.58 MHz oscillator
CIDMD2.6
TB on/off
TB on/off = 0: disable 32.768 kHz timebase;
TB on/off = 1: enable 32.768 kHz timebase
CIDMD2.5
SEC/MIN
SEC/MIN = 0: every minute a timebase interrupt;
SEC/MIN = 1: every second a timebase interrupt
CIDMD2.4
INT-SUP on/off
INT-SUP on/off = 0: enable SEC/MIN interrupts during FSK reception;
INT-SUP on/off = 1: disable SEC/MIN interrupts during FSK reception
CIDMD2.3 to
CIDMD2.0
reserved bits



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