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AM29LV640MT100REF датащи(PDF) 36 Page - Advanced Micro Devices |
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AM29LV640MT100REF датащи(HTML) 36 Page - Advanced Micro Devices |
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36 / 66 page ![]() 34 Am29LV640MT/B 26190C8 February 1, 2007 D A TA SH EE T The system can monitor DQ3 to determine if the sec- tor erase timer has timed out. See DQ3: Sector Erase Timer on page 41. The time-out begins from the rising e d g e of t h e f i n a l WE# p u l se i n t h e co mm an d sequence. When the Embedded Erase algorithm is complete, the device returns to reading array data and addresses are no longer latched. The system can determine the status of the erase operation by reading DQ7, DQ6, or DQ2 in the erasing sector. See Write Operation Status on page 38 for information on these status bits. Once the sector erase operation has begun, only the Erase Suspend command is valid. All other com- mands are ignored. However, note that a hardware reset immediately terminates the erase operation. If that occurs, the sector erase command sequence should be reinitiated once the device has returned to reading array data, to ensure data integrity. Figure 7 illustrates the algorithm for the erase opera- tion. See the table, Erase and Program Operations on page 48 in AC Characteristics for parameters, and Fig- ure 19 for timing diagrams. Figure 7. Erase Operation START Write Erase Command Sequence (Notes 1, 2) Data Poll to Erasing Bank from System Data = FFh? No Yes Erasure Completed Embedded Erase algorithm in progress Notes: 1. See Table 12 and Table 13 for erase command sequence. 2. See DQ3: Sector Erase Timer on page 41 for information on the sector erase timer. |
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