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AM29BDS640G датащи(PDF) 69 Page - Advanced Micro Devices |
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AM29BDS640G датащи(HTML) 69 Page - Advanced Micro Devices |
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69 / 77 page ![]() May 9, 2006 25903C2 Am29BDS640G 67 Data Sheet AC Characteristics Notes: 1. RDY active with data (A18 = 1 in the Burst Mode Configuration Register). 2. RDY active one clock cycle before data (A18 = 0 in the Burst Mode Configuration Register). 3. Cxx indicates the clock that triggers Dxx on the outputs; for example, C60 triggers D60. Figure shows the device not crossing a bank in the process of performing an erase or program. Figure 30. Latency with Boundary Crossing CLK Address (hex) C60 C61 C62 C63 C63 C63 C64 C65 C66 C67 D60 D61 D62 D63 D64 D65 D66 D67 (stays high) AVD# RDY Data OE#, CE# (stays low) Address boundary occurs every 64 words, beginning at address 00003Fh (00007Fh, 0000BFh, etc.). Address 000000h is also a boundary crossing. 3C 3D 3E 3F 3F 3F 40 41 42 43 latency RDY latency tRACC (Note 1) (Note 2) tRACC tRACC tRACC |
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