ES9826 datasheet(22/88 Pages) ESS

22 / 88 page

ES9826 Datasheet

VERSION 0.1.2

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM

GPIO Configuration

GPIOs 3 to 6 have 16 configurable modes set by GPIO#_CFG. The table below shows the available configurations:

GPIO_CFG

Function

Input /

Output

GPIO3 GPIO4 GPIO5 GPIO6

Description

4’d0

Analog

Shutdown

Output shutdown

4’d1

AUX Input

N/A

PDM

DATA

N/A

GPIO4 is PDM DATA input.

4’d2

AUX Output

PCM

DATA

N/A

PDM

CLK

N/A

GPIO5 is PDM CLK output in PDM

mode.

GPIO3 is PCM DATA in PCM mode.

4’d3

RESERVED

N/A

4’d4

RESERVED

N/A

4’d5

CH1 Peak

Interrupt

CH1 Peak Interrupt

Interrupt status of Ch1 peak detector.

4’d6

CH2 Peak

Interrupt

CH2 Peak Interrupt

Interrupt status of Ch2 peak detector.

4’d7

OR of all

interrupts

OR of all unmasked interrupts

OR of ARE and Peak detect interrupts.

4’d8

S/PDIF data

stream

S/PDIF data stream

S/PDIF output format.

Requires ENABLE_SPDIF_ENCODE =

4’d9

PWM Signal

PWM signal

PWM output. See PWM Signal for

formula.

4’d10

CH1 ARE

Interrupt

CH1 ARE Interrupt

CH1 ARE interrupt

4’d11

CH2 ARE

Interrupt

CH2 ARE Interrupt

CH2 ARE interrupt.

4’d12

CLK_IADC

Front-end decimation path clock. Should

ideally be run at 24.576MHz /

22.5792MHz.

4’d13

CLK_ADC

(128*FS Hz)

CLK_ADC

Back-end decimation path clock. Needs

to be run at 128*FS.

Note: 64*FS with ENABLE_2X_MODE.

4’d14

Output 0

Output 0.

4’d15

Output 1

Output 1.

Table 13 - GPIO Configuration function

Note: If PDM_INPUT_SEL is set, it will automatically output PDM CLK on GPIO5 and expect PDM data input on GPIO4.

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