CS5535 datasheet(261/555 Pages) NSC

261 / 555 page

Revision 0.8

261

www.national.com

5.5

USB CONTROLLER REGISTER DESCRIPTIONS

The control registers allow software to communicate with

the USB Controller. These control registers can be broadly

divided into four register sets:

• Standard GeodeLink Device MSRs

• USB Specific MSRs

• USB Embedded PCI Configuration Registers

• Host Controller Native Registers

The MSRs (both Standard and Specific) are accessed via

the RDMSR and WRMSR processor instructions. The MSR

address is derived from the perspective of the CPU Core.

See Section 3.2 "CS5535 MSR Addressing" on page 53 for

more details on MSR addressing. The USB Transceiver

Control MSR (MSR_USBXCVR) is dedicated to the USB

transceivers and allows software to control transceiver volt-

age and current settings. It also provides a mechanism by

which the software can turn on or turn off the transmitter

side of the transceiver for power management purposes.

The embedded PCI Configuration Registers are 32-bit reg-

isters decoded from the embedded PCI address bits 7

through 2 and C/BE[3:0]#, when IDSEL is high, AD[10:8]

select the appropriate function, and AD[1:0] are 00. This

embedded PCI bus is accessed via special GeodeLink

Adapter MSR accesses. Bytes within a 32-bit address are

selected with the valid byte enables. All registers can be

accessed via 8, 16, or 32-bit cycles (i.e., each byte is indi-

vidually selected by the byte enables.) Registers marked

as reserved, and reserved bits within a register are not

implemented and should return 0s when read. Writes have

no effect for reserved registers.

The Host Controller (HC) contains a set of on-chip opera-

tional registers that are mapped into a non-cacheable por-

tion of the system addressable space. These registers are

used by the Host Controller Driver (HCD). According to the

function of these registers, they are divided into four parti-

tions, specifically for Control and Status, Memory Pointer,

Frame Counter and Root Hub. All of the registers should be

read and written as DWORDs. To ensure interoperability,

the Host Controller driver that does not use a reserved field

should not assume that the reserved field contains 0. Fur-

thermore, the Host Controller driver should always pre-

serve the value(s) of the reserved field. When a R/W

read the register, modify the bits desired, then write the

value. Alternatively, the Host Controller Driver can maintain

an in-memory copy of previously written values that can be

modified and then written to the Host Controller register.

When a write to set/clear register is written, bits written to

reserved fields should be 0. These registers can be

grouped into four functional groups: Host Controller control

and status registers, memory pointers, frame counter and

control registers, and Root Hub status and control.

• Host Controller control and status registers define the

operating mode of the host controller. They reflect

current status of the host controller, provide interrupt

control and status, and reflect error status conditions.

• Memory pointers provide pointers to the data structure

that are required to communicate with the host controller

driver and perform transactions based on the transfer

descriptors that reside in memory.

• Frame counter and control provide frame timing status

and control. This set of registers also govern Start Of the

Frame (SOF) timing and control events that are tied to

frame timing intervals.

• Root Hub status and control registers are dedicated to

the root hub function. Two sets of registers are included

to control the two ports.

Tables 5-13 through 5-16 are register summary tables that

include reset values and page references where the regis-

ter maps and bit descriptions are provided.

Table 5-13. Standard GeodeLink Device MSRs Summary

MSR Address

Type

Reset Value

Reference

USBC1: 51600000h

USBC2: 51200000h

GeodeLink Device Capabilities MSR

(USBC_GLD_MSR_CAP)

00000000_002420xxh

Page 264

USBC1: 51600001h

USBC2: 51200001h

R/W

GeodeLink Device Master Configuration

MSR (USBC_GLD_MSR_CONFIG)

00000000_0000F000h

Page 264

USBC1: 51600002h

USBC2: 51200002h

R/W

GeodeLink Device SMI MSR

(USBC_GLD_MSR_SMI)

00000000_00000000h

Page 265

USBC1: 51600003h

USBC2: 51200003h

R/W

GeodeLink Device Error MSR

(USBC_GLD_MSR_ERROR)

00000000_00000000h

Page 266

USBC1: 51600004h

USBC2: 51200004h

R/W

GeodeLink Device Power Management

MSR (USBC_GLD_MSR_PM)

00000000_00000000h

Page 268

USBC1: 51600005h

USBC2: 51200005h

R/W

GeodeLink Device Diagnostic MSR

(USBC_GLD_MSR_DIAG)

00000000_00000000h

Page 269

CS5535 датащи(PDF) 261 Page - National Semiconductor (TI)

CS5535 датащи(HTML) 261 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL