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Revision 0.8

GLPCI_SB Register Descriptions (Continued)

5.2.1.4

GeodeLink Device Error MSR (GLPCI_GLD_MSR_ERROR)

The flags are set by internal conditions. The internal conditions are enabled if the EN bit is 1. Reading the FLAG bit returns

the value; writing 1 clears the flag; writing 0 has no effect. (See Section 3.8.4 "MSR Address 3: Error Control" on page 71

for further details.)

GLPCI_GLD_MSR_SMI Bit Descriptions

Bit

Name

Description

63:23

RSVD (RO)

Reserved (Read Only). Returns 0.

TAS_ASMI_

FLAG

Target Abort Signaled ASMI Flag. If high, records that an ASMI was generated due the

signaling of a target abort on the PCI bus. Write 1 to clear; writing 0 has no effect.

TA_ASMI_EN (bit 6) must be high to generate ASMI and set flag.

PAR_ASMI_

FLAG

Parity Error ASMI Flag. If high, records that an ASMI was generated due to the detec-

tion of a PCI bus parity error. Write 1 to clear; writing 0 has no effect. PAR_ASMI_EN (bit

5) must be high to generate ASMI and set flag.

SYSE_ASMI_

FLAG

System Error ASMI Flag. If high, records that an ASMI was generated due to the detec-

tion of a PCI bus system error. Write 1 to clear; writing 0 has no effect. SYSE_ASMI_EN

(bit 4) must be high to generate ASMI and set flag.

EXCEP_ASMI_

FLAG

Exception Bit Flag. If high, records that an ASMI was generated due to the EXCEP bit

being set in the received GLIU read or write response packet. Write 1 to clear; writing 0

has no effect. EXCEP_ASMI_EN (bit 3) must be set to enable this flag.

SSMI_ASMI_

FLAG

SSMI ASMI Flag. If high, records that an ASMI was generated due to the SSMI bit being

set in the received GLIU read or write response packet. Write 1 to clear; writing 0 has no

effect. SSMI_ASMI_EN (bit 2) must be set to enable this flag.

TAR_ASMI_

FLAG

Target Abort Received ASMI Flag. If high, records that an ASMI was generated due to

the reception of a target abort on the PCI bus. Write 1 to clear; writing 0 has no effect.

TAR_ASMI_EN (bit 1) must be high to generate ASMI and set flag.

MAR_ASMI_

FLAG

Master Abort Received ASMI Flag. If high, records that an ASMI was generated due to

the reception of a master abort on the PCI bus. Write 1 to clear; writing 0 has no effect.

MAR_ASMI_EN (bit 0) be high to generate ASMI and set flag.

15:7

RSVD (RO)

Reserved (Read Only). Returns 0.

TAS_ASMI_EN

Target Abort Signaled ASMI Enable. Write 1 to enable TAS_ASMI_FLAG (bit 22) and

to allow the event to generate an ASMI.

PAR_ASMI_EN

Parity Error ASMI Enable. Write 1 to enable PAR_ASMI_FLAG (bit 21) and to allow the

event to generate an ASMI.

SYSE_ASMI_

System Error SMI Enable. Write 1 to enable SYSE_ASMI_FLAG (bit 20) and to allow

the event to generate an ASMI.

EXCEP_ASMI_

Exception Bit Enable. Write 1 to enable EXCEP_ASMI_FLAG (bit 19) and to allow the

event.

SSMI_EN

SSMI Enable. Write 1 to enable SSMI_ASMI_FLAG bit (bit 18) and to allow the event.

TAR_ASMI_EN

Target Abort Received ASMI Enable. Write 1 to enable TAR_ASMI_FLAG (bit 17) and

to allow the event to generate an ASMI.

MAR_ASMI_EN

Master Abort Received ASMI Enable. Write 1 to enable MAR_ASMI_FLAG (bit 16) and

to allow the event to generate an ASMI.

MSR Address

51000003h

Type

R/W

Reset Value

00000000_00000000h

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