NXP Semiconductors

PCA9574

8-bit I2C-bus and SMBus, level translating, low voltage GPIO with reset and interrupt

0 A

S

target address

START condition

R/W acknowledge

from target

002aad057

0 0 0 0 1 0 1

0

command byte

A

acknowledge

from target

1 2 3 4 5 6 7 8

SCL

9

SDA

DATA 1

A

write to port

data out from port

tv(Q)

acknowledge

from target

DATA 1 VALID

data to port

1 0 0 0 0 A0

0

P

STOP

condition

Figure 11. Write to Output port register

0 A

S

target address

START condition

R/W acknowledge

from target

002aad058

0 0 0 0 X X X

0

command byte

A

acknowledge

from target

1 2 3 4 5 6 7 8

SCL

9

SDA

DATA

A

data to register

acknowledge

from target

data to register

1 0 0 0 0 A0

0

P

STOP

condition

Figure 12. Write to Polarity inversion, Bus-hold enable, Pull-up/pull-down selector, Configuration, Interrupt mask

and Interrupt status registers

1 0 0 0 0 A0 0 A

S 0

START condition

R/W

acknowledge

from target

002aad059

A

acknowledge

from target

SDA

A

P

command byte

acknowledge

from controller

data from register

DATA (first byte)

target address

STOP

condition

S

(repeated)

START condition

(cont.)

(cont.)

1 0 0 0 0 A0 1 A

0

R/W

acknowledge

from target

target address

at this moment controller-transmitter becomes controller-receiver

and target-receiver becomes target-transmitter

NA

no acknowledge

from controller

data from register

DATA (last byte)

Figure 13. Read from register

PCA9574

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Product data sheet

Rev. 6.0 — 31 May 2023

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