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MPC850 датащи(PDF) 55 Page - Freescale Semiconductor, Inc

номер детали MPC850
подробное описание детали  PowerQUICC™ Integrated Communications Processor Hardware Specifications
PDF  72 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC850 датащи(HTML) 55 Page - Freescale Semiconductor, Inc

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MPC850 PowerQUICC™ Integrated Communications Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
55
CPM Electrical Characteristics
Figure 53. Ethernet Collision Timing Diagram
Figure 54. Ethernet Receive Timing Diagram
134
TENA inactive delay (from TCLKx rising edge)
10.00
50.00
ns
138
CLKOUT low to SDACK asserted 2
—
20.00
ns
139
CLKOUT low to SDACK negated 2
—
20.00
ns
1
The ratios SyncCLK/RCLKx and SyncCLK/TCLKx must be greater or equal to 2/1.
2
SDACK is asserted whenever the SDMA writes the incoming frame destination address into memory.
Table 20. Ethernet Timing (continued)
Num
Characteristic
All Frequencies
Unit
Min
Max
CLSN(CTSx)
120
(Input)
RCLKx
121
RXDx
(Input)
121
RENA(CDx)
(Input)
125
124
123
127
126
Last Bit
122



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