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MPC7448 датащи(PDF) 40 Page - Freescale Semiconductor, Inc |
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MPC7448 датащи(HTML) 40 Page - Freescale Semiconductor, Inc |
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40 / 60 page ![]() MPC7448 RISC Microprocessor Hardware Specifications, Rev. 3 40 Freescale Semiconductor System Design Information Figure 19. Voltage Transient Example 9.2.4 Decoupling Recommendations Due to the MPC7448 dynamic power management feature, large address and data buses, and high operating frequencies, the MPC7448 can generate transient power surges and high frequency noise in its power supply, especially while driving large capacitive loads. This noise must be prevented from reaching other components in the MPC7448 system, and the MPC7448 itself requires a clean, tightly regulated source of power. Therefore, it is recommended that the system designer use sufficient decoupling capacitors, typically one capacitor for every VDD pin, and a similar amount for the OVDD pins, placed as close as possible to the power pins of the MPC7448. It is also recommended that these decoupling capacitors receive their power from separate VDD, OVDD, and GND power planes in the PCB, using short traces to minimize inductance. These capacitors should have a value of 0.01 or 0.1 µF. Only ceramic surface mount technology (SMT) capacitors should be used to minimize lead inductance. Orientations where connections are made along the length of the part, such as 0204, are preferable but not mandatory. Consistent with the recommendations of Dr. Howard Johnson in High Speed Digital Design: A Handbook of Black Magic (Prentice Hall, 1993) and contrary to previous recommendations for decoupling Freescale microprocessors, multiple small capacitors of equal value are recommended over using multiple values of capacitance. In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB, feeding the VDD and OVDD planes, to enable quick recharging of the smaller chip capacitors. These bulk capacitors should have a low equivalent series resistance (ESR) rating to ensure the quick response time necessary. They should also be connected to the power and ground planes through two vias to minimize inductance. Suggested bulk capacitors are 100–330 µF (AVX TPS tantalum or Sanyo OSCON). 9.3 Connection Recommendations To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal level. Unless otherwise noted, unused active low inputs should be tied to OVDD and unused active high inputs should be connected to GND. All NC (no connect) signals must remain unconnected. VDD (nominal) 1.40 V A + B < T • 10% 1.35 V VDD (maximum) A C B T C < T • 0.2% VDD (minimum) Normal Low Transient High Transient |
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