16

ICS9LPRS355

Datasheet

1205—06/24/14

FSLC

2

B0b7

FSLB

1

B0b6

FSLA

1

B0b5

CPU

MHz

SRC

MHz

PCI

MHz

REF

MHz

USB

MHz

DOT

MHz

00

0

266.66

00

1

133.33

01

0

200.00

01

1

166.66

10

0

333.33

10

1

100.00

11

0

400.00

11

1

1. FS

LA and FSLB are low-threshold inputs .Please s ee VIL_FS and VIH_FS spec ific ations in

the Input/Supply/Common Output Parameters Table for correct values.

Also refer to the Test Clarification Table.

2. FS

LC is a three-level input. Pleas e see the VIL_FS and VIH_FS

specifications in the Input/Supply/Common Output Parameters Table for correct values.

Table 1: CPU Frequency Select Table

96.00

100.00

33.33

14.318

48.00

Reserved

Pin17 (TSSOP)

/ Pin24 (MLF)

Pin18 (TSSOP)

/ Pin25 (MLF)

Spread

MHz

MHz

%

0

00

0

0

0

0

0

0

1

100.00

100.00

0.5% Down Spread

SRCCLK1 from SRC_MAIN

0

0

0

1

0

100.00

100.00

0.5% Down Spread

Only SRCCLK1 from PLL3

0

0

0

1

1

100.00

100.00

1% Down Spread

Only SRCCLK1 from PLL3

0

0

1

0

0

100.00

100.00

1.5% Down Spread

Only SRCCLK1 from PLL3

0

0

1

0

1

100.00

100.00

2% Down Spread

Only SRCCLK1 from PLL3

0

0

1

1

0

100.00

100.00

2.5% Down Spread

Only SRCCLK1 from PLL3

0

01

1

1

N/A

N/A

N/A

N/A

0

1

0

0

0

24.576

24.576

None

24.576Mhz on SE1 and SE2

0

1

0

0

1

24.576

98.304

None

24.576Mhz on SE1, 98.304Mhz on SE2

0

1

0

1

0

98.304

98.304

None

98.304Mhz on SE1 and SE2

0

1

0

1

1

27.000

27.000

None

27Mhz on SE1 and SE2

0

1

1

0

0

25.000

25.000

None

25Mhz on SE1 and SE2

0

11

0

1

N/A

N/A

N/A

N/A

0

11

1

0

N/A

N/A

N/A

N/A

0

11

1

1

N/A

N/A

N/A

N/A

1

00

0

0

N/A

N/A

N/A

1

00

0

1

N/A

N/A

N/A

1

00

1

0

27MHz_nonSS

27MHz_SS

0.5% Down Spread

1

00

1

1

27MHz_nonSS

27MHz_SS

1% Down Spread

1

01

0

0

27MHz_nonSS

27MHz_SS

1.5% Down Spread

1

01

0

1

27MHz_nonSS

27MHz_SS

2% Down Spread

1

01

1

0

27MHz_nonSS

27MHz_SS

0.75% Down Spread

1

01

1

1

27MHz_nonSS

27MHz_SS

1.25% Down Spread

1

10

0

0

27MHz_nonSS

27MHz_SS

1.75% Down Spread

1

10

0

1

27MHz_nonSS

27MHz_SS

0.5% Center Spread

1

10

1

0

27MHz_nonSS

27MHz_SS

0.75% Center Spread

1

10

1

1

N/A

N/A

1

11

0

0

N/A

N/A

1

11

0

1

N/A

N/A

1

11

1

0

N/A

N/A

1

11

1

1

N/A

N/A

Table 2: PLL3 Quick Configuration

B1b1

B1b4

B1b3

B1b2

27_Select

Comment

PLL 3 disabled