18

604 Hardware Specifications

Preliminary/Subject to Change without Notice

PLL_CFG0–PLL_CFG3

A08, B09, A09, D09

High

Input

RSRV

D01

Low

Output

RUN

C08

High

Input

SHD

H04

Low

I/O

SMI

A16

Low

Input

SRESET

B14

Low

Input

SYSCLK

C09

—

Input

TA

H14

Low

Input

TBEN

C02

High

Input

TBST

A14

Low

I/O

TC0–TC2

A02, A03, C06

High

Output

TCK

C11

High

Input

TDI

A11

High

Input

TDO

A12

High

Output

TEA

H13

Low

Input

TMS

B11

High

Input

TRST

C10

Low

Input

TS

J13

Low

I/O

TSIZ0–TSIZ2

A13, D10, B12

High

I/O

TT0–TT4

B13, A15, B16, C14, C15

High

I/O

WT

D02

Low

Output

VDD 3

F06, F08, F09, F11, G07, G10, H06, H08, H09, H11, J06,

J08, J09, J11, K07, K10, L06, L08, L09, L11

——

XATS

J16

Low

I/O

Notes:

1. These are test signals for factory use only and must be pulled up to VDD for normal machine operation.

2. These are drive mode signals that must be pulled up to VDD to operate in accordance to these

specifications.

3. In the 604 BGA package, there is no electrical distinction between the OVDD and the VDD pins. These

signals are internally shorted together. The OVDD and VDD signals have been listed separately to

maintain compatibility with future parts.

Table 10. Pinout Listing for the BGA Package (Continued)

Signal Name

Pin Number

Active

I/O

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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