AD7142 datasheet(34/68 Pages) AD

34 / 68 page

AD7142

Rev. 0 | Page 34 of 68

NOTES

1. A START CONDITION AT THE BEGINNING IS DEFINED AS A HIGH-TO-LOW TRANSITION ON SDA WHILE SCLK REMAINS HIGH.

2. A STOP CONDITION AT THE END IS DEFINED AS A LOW-TO-HIGH TRANSITION ON SDA WHILE SCLK REMAINS HIGH.

3. THE MASTER GENERATES THE ACK AT THE END OF THE READBACK TO SIGNAL THAT IT DOES NOT WANT ADDITIONAL DATA.

4. 7-BIT DEVICE ADDRESS [DEV A6:DEV A0] = [0 1 0 1 1 X X], WHERE THE TWO LSB X's ARE DON'T CARE BITS.

5. 16-BIT REGISTER ADDRESS[A15:A0] = [X, X, X, X, X, X, A9, A8, A7, A6, A5, A4, A3, A2, A1, A0], WHERE THE UPPER LSB X’s ARE DON’T CARE BITS.

6. REGISTER ADDRESS [A15:A8] AND REGISTER ADDRESS [A7:A0] ARE ALWAYS SEPARATED BY A LOW ACK BITS.

7. REGISTER DATA [D15:D8] AND REGISTER DATA [D7:D0] ARE ALWAYS SEPARATED BY A LOW ACK BIT.

8. THE R/W BIT IS SET TO A1 TO INDICATE A READBACK OPERATION.

SDA

DEV

R/W

SCLK

DEV

234

DEV

ACK

A15

A14

5678

910

START

AD7142-1 DEVICE ADDRESS

ACK

DEV

AD7142 DEVICE ADDRESS

ACK

AD7142-1 DEVICE ADDRESS

DEV

R/W

ACK

AD7142-1 DEVICE ADDRESS

DEV

R/W

USING

REPEATED START

SEPARATE READ AND

WRITE TRANSACTIONS

ACK

Figure 49. Example of I2C Timing for Single Register Readback Operation

WRITE

OUTPUT FROM MASTER

OUTPUT FROM AD7142

6-BIT DEVICE

ADDRESS

S = START BIT

P = STOP BIT

SR = REPEATED START BIT

ACK = ACKNOWLEDGE BIT

ACK = NO ACKNOWLEDGE BIT

[15:8]

[7:0]

WRITE DATA

HIGH BYTE [15:8]

WRITE DATA

LOW BYTE [7:0]

WRITE DATA

HIGH BYTE [15:8]

WRITE DATA

LOW BYTE [7:0]

READ DATA

HIGH BYTE [15:8]

READ DATA

LOW BYTE [7:0]

READ (USING REPEATED START)

6-BIT DEVICE

ADDRESS

HIGH BYTE

LOW BYTE

6-BIT DEVICE

ADDRESS

READ DATA

HIGH BYTE [15:8]

READ DATA

LOW BYTE [7:0]

READ DATA

HIGH BYTE [15:8]

READ DATA

LOW BYTE [7:0]

READ (WRITE TRANSACITON SETS UP REGISTER ADDRESS)

6-BIT DEVICE

ADDRESS

HIGH BYTE

LOW BYTE

6-BIT DEVICE

ADDRESS

READ DATA

HIGH BYTE [15:8]

READ DATA

LOW BYTE [7:0]

ACK

Figure 50. Example of Sequential I2C Write and Readback Operation

VDRIVE INPUT

The supply voltage to all pins associated with both the I2C and

SPI serial interfaces (SDO, SDI, SCLK, SDA, and CS) is separate

from the main VCC supplies and is connected to the VDRIVE pin.

This allows the AD7142 to be connected directly to processors

whose supply voltage is less than the minimum operating

voltage of the AD7142 without the need for external level-

shifters. The VDRIVE pin can be connected to voltage supplies as

low as 1.65 V and as high as DVCC.

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