STUW81300 datasheet(8/63 Pages) STMICROELECTRONICS

8 / 63 page

Pin definitions

STuW81300

8/63

DS11314 Rev 7

Table 2. Pin descriptions

Pin No

Name

Description

Observation

CBYP_4V5

Connection for 4.5 V regulator bypass capacitor -

VREG_4V5

Regulated output voltage of 4.5 V regulator

VCC_VCO_Core

Supply voltage of VCO Core

Must be connected to

VREG_4V5

HW_PD

HW Power Down

CMOS Schmitt Triggered Input,

1.8 V compatible, 3.3 V tolerant

PDRF1

RF1 output stage Power Down control

CMOS Schmitt Triggered Input,

1.8 V compatible, 3.3 V tolerant

PDRF2/FL_SW

RF2 output stage Power Down control / Fast-

Lock switch

CMOS Schmitt Triggered Input,

1.8 V compatible, 3.3 V tolerant.

Can be also used as switch for

fast-lock loop filter configuration

CBYP

Connection of VCO regulator bypass capacitor -

8VREG_VCO

Regulated output voltage of VCO circuitry

regulator

VIN_LDO_VCO

Supply voltage of VCO circuitry regulator

Connection of reference voltage filtering

capacitor

VCTRL

VCO control voltage

EXTVCO_INP

External VCO positive input

Must be connected to ground if

external VCO is not used

EXTVCO_INN

External VCO negative input

Must be connected to ground if

external VCO is not used

VDD_CP

Digital charge-pump supply voltage

Must be connected to

VREG_VCO

ICP

PLL charge pump output

VCC_CPOUT

Supply voltage for charge pump output stage

Must be connected to

VREG_4V5

VDD_PFD

Supply voltage of digital phase/frequency

detector

Must be connected to

VREG_REF

VIN_LDO_REF

Supply voltage for reference clock regulator

VREG_REF

Regulated supply voltage of PLL

REF_CLKN

Reference clock negative input

REF_CLKP

Reference clock positive input

LD_SDO

Lock detector / SPI data output

CMOS push-pull Output 2.5 V

with slew rate control or open

drain (1.8 V to 3.3 V tolerant)

SDI

SPI data input

CMOS Schmitt triggered Input,

1.8 V compatible, 3.3 V tolerant

SCK

SPI clock

CMOS Schmitt triggered Input,

1.8 V compatible, 3.3 V tolerant

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