At every switching cycle LON stays high for the blanking time TLEB. After the blanking time is expired, the LON is

turned off when the CS comparator is triggered.

8.6.2.1

Reference generator

During normal operation the reference for the peak current mode control is provided by the secondary side

through the galvanic isolation communication channel.

The primary side IC converts the duration of pulses received by the secondary side in a voltage reference for the

peak current comparator according to the equation:

vpk=GTVtpulse

(8)

The reference voltage is limited by a hardware clamp to VIPKCLAMP.

The pulses are generated by the secondary side SMEDs.

8.6.3

Voltage loop

The voltage loop is managed by a digital PI (Type2) controller.

The device parameters control the proportional and integral gain of the controller. If sampling effects are ignored,

the controller gain can be expressed as follows:

IpeakVerr= GTVRsense 8FckVfsrMaxPID_Pgain+ 1sTsampPID_Igain

(9)

Where Rsense is the primary side current sense resistor value, Fck is the clock frequency (132 MHz typ.), VfsrMax

is the ADC full scale range at the highest scale (24 V), GTV is the time-voltage converter gain and Tsamp is the

control loop sampling period (30 us).

Considering the primary side peak current to average output current relation, the equation can be written as:

IsecVerr= nVin

nVout+Vin GTVRsense 4

FckVfsrMax PID_Pgain+ 1sTsampPID_Igain

(10)

Where n is the turns ratio (primary to secondary) and Isec is the transformer secondary side average current.

8.6.3.1

Setting the voltage loop parameters

The loop cutoff frequency is dominated by the proportional part of the controller, and can be approximated as:

ft≈ 12π GTVRsense 8FckVfsrMaxPID_Pgain nVin

nVout+Vin 1Cout

(11)

The proportional gain can be set as:

PID_Pgain=ftπRsenseFckVfsrMax

4GTV nVoutVin+1nCout

(12)

It is advisable to keep the cutoff frequency at least below 1/5 of the loop sampling frequency, i.e. below 8 kHz. If

no need for fast transient response is required, a lower bandwidth helps in limiting the control noise.

The integral gain determines the loop zero frequency as:

PID_Igain=PID_Pgain∙2πfzTsamp

(13)

8.6.4

Current loop

The current loop is controlled by a dedicated PI controller which acts on the primary side peak current in a similar

way to the voltage loop. The control gain is:

IpeakIerr=RsenseSecGTV

Rsense 2FckVCSFSR 1sTsampPIDCC_Igain

(14)

Where RsenseSec is the secondary side current sense resistor value.

Considering the primary side peak current to average output current relation, the equation can be written as:

IsecIerr= nVin

nVout+VinRsenseSecGTV

Rsense 1FckVCSFSR 1sTsampPIDCC_Igain

(15)

Where n is the turns ratio (primary to secondary) and Isec is the transformer secondary side average current.

8.6.4.1

Setting the current loop parameters

If the load impedance is close to 0, the loop cutoff frequency can be calculated as:

ST-ONEMP

Control loop

DS13989 - Rev 2

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