M58LR128FT datasheet(12/82 Pages) STMICROELECTRONICS

12 / 82 page

M58LR128FT, M58LR128FB

12/82

COMMAND INTERFACE

All Bus Write operations to the memory are inter-

preted by the Command Interface. Commands

consist of one or more sequential Bus Write oper-

ations. An internal Program/Erase Controller han-

dles all timings and verifies the correct execution

of the program and erase commands. The Pro-

gram/Erase Controller provides a Status Register

whose output may be read at any time to monitor

the progress or the result of the operation.

The Command Interface is reset to read mode

when power is first applied, when exiting from Re-

set or whenever VDD is lower than VLKO. Com-

mand sequences must be followed exactly. Any

invalid combination of commands will be ignored.

Refer to Table 4., Command Codes, Table

5., Standard Commands, and Table 6., Factory

Program Command, for a summary of the Com-

mand Interface.

Table 4. Command Codes

Read Array Command

The Read Array command returns the addressed

bank to Read Array mode.

One Bus Write cycle is required to issue the Read

Array command. Once a bank is in Read Array

mode, subsequent read operations will output the

data from the memory array.

A Read Array command can be issued to any

banks while programming or erasing in another

bank.

If the Read Array command is issued to a bank

currently executing a program or erase operation,

the bank will return to Read Array mode but the

program or erase operation will continue, however

the data output from the bank is not guaranteed

until the program or erase operation has finished.

The read modes of other banks are not affected.

Read Status Register Command

The device contains a Status Register that is used

to monitor program or erase operations.

The Read Status Register command is used to

read the contents of the Status Register for the ad-

dressed bank.

One Bus Write cycle is required to issue the Read

Status Register command. Once a bank is in Read

Status Register mode, subsequent read opera-

tions will output the contents of the Status Regis-

ter.

The Status Register data is latched on the falling

edge of the Chip Enable or Output Enable signals.

Either Chip Enable or Output Enable must be tog-

gled to update the Status Register data

The Read Status Register command can be is-

sued at any time, even during program or erase

operations. The Read Status Register command

will only change the read mode of the addressed

bank. The read modes of other banks are not af-

fected. Only Asynchronous Read and Single Syn-

chronous Read operations should be used to read

the Status Register. A Read Array command is re-

quired to return the bank to Read Array mode.

See Table 9. for the description of the Status Reg-

ister Bits.

Read Electronic Signature Command

The Read Electronic Signature command is used

to read the Manufacturer and Device Codes, the

Lock Status of the addressed bank, the Protection

One Bus Write cycle is required to issue the Read

Electronic Signature command. Once a bank is in

Read Electronic Signature mode, subsequent

read operations in the same bank will output the

Manufacturer Code, the Device Code, the Lock

Hex Code

Command

01h

Block Lock Confirm

03h

Set Configuration Register Confirm

10h

Alternative Program Setup

20h

Block Erase Setup

2Fh

Block Lock-Down Confirm

40h

Program Setup

50h

Clear Status Register

60h

Block Lock Setup, Block Unlock Setup,

Block Lock Down Setup and Set

Configuration Register Setup

70h

Read Status Register

80h

Buffer Enhanced Factory Program

90h

Read Electronic Signature

98h

Read CFI Query

B0h

Program/Erase Suspend

C0h

Protection Register Program

D0h

Program/Erase Resume, Block Erase

Confirm, Block Unlock Confirm or Buffer

Program Confirm

E8h

Buffer Program

FFh

Read Array

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