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LT3073AVPBF датащи(PDF) 28 Page - Analog Devices |
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LT3073AVPBF датащи(HTML) 28 Page - Analog Devices |
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28 / 37 page ![]() Data Sheet LT3073 analog.com Rev 0. 28 of 37 Stability and Input Capacitance The LT3073 is stable with a minimum capacitance of 4.7μF connected to the IN pins. Use low ESR capacitors to minimize instantaneous voltage drops under large-load transient conditions. Large VIN droops during large-load transients may cause the regulator to enter dropout with the corresponding degradation in load transient response. Therefore, increased input and output capacitance values may be necessary depending on an application’s requirements. Sufficient input capacitance is critical as the circuit is intentionally operated close to dropout to minimize power. Ideally, the output impedance of the supply that powers IN should be less than 20mΩ to support a 3A load with large transients. In cases where a wire is used to connect a power supply to the input of the LT3073 (and also from the ground of the LT3073 back to the power supply ground), large input capacitors are required to avoid an unstable application. This is due to the inductance of the wire forming an LC tank circuit with the input capacitor and not a result of the LT3073 being unstable. A wire's self-inductance, or isolated inductance, is directly proportional to its length. However, the diameter of a wire does not have a significant influence on its self-inductance. For example, one inch of 18-AWG, 0.04 inch diameter wire has 28nH of self-inductance. The self-inductance of a 2-AWG isolated wire with a diameter of 0.26 inch is about half the inductance of the 18-AWG wire. The overall self-inductance of a wire can be reduced in two ways. One is to divide the current flowing toward the LT3073 between two parallel conductors. In this case, the farther the wires are placed apart, the more the inductance is reduced, up to a 50% reduction when set a few inches apart. Splitting the wires connects two equal inductors in parallel. However, when placed near each other, mutual inductance is added to the overall self-inductance of the wires. The most effective way to reduce overall inductance is to place the forward and return-current conductors (the wire for the input and the wire for the return ground) in very close proximity. In this case, two 18-AWG wires separated by 0.05 inches reduce the overall self-inductance to about one-fourth of a single isolated wire. If the LT3073 is powered by a battery mounted near the ground and power planes on the same circuit board, a 10μF input capacitor is sufficient for stability. If a distant supply powers the LT3073, use a low ESR, large value input capacitor on the order of 220μF. As power supply output impedance varies, the minimum input capacitance needed for application stability also varies. BIAS/BIASF Pin Requirements The BIAS pin supplies current to most of the internal control circuitry and the output stage, driving the pass transistor. The LT3073 requires a minimum 2.2μF bypass capacitor on the BIASF pin for stability and proper operation. No bypass capacitor is needed on the BIAS pin. To ensure proper operation, the BIAS voltage must satisfy the following conditions: 2.375V ≤ VBIAS ≤ 5.5V and VBIAS ≥ (VOUT + 1.2V). For VOUT ≤ 1.15V, the minimum BIAS voltage is limited to 2.375V. Load Regulation The LT3073 corrects for a parasitic package, and PCB I-R drops when the SENSE pin is Kelvin connected to output capacitors. The LT3073 handles moderate levels of output line impedance, but excessive impedance between VOUT and COUT causes an excessive phase shift in the feedback loop and adversely affects stability. PCB Layout Considerations Given the LT3073’s high bandwidth and high PSRR, careful PCB layout must be employed to achieve full device performance. Figure 74 shows the EVAL-LT3073-AZ evaluation board with a layout that delivers the full performance of the regulator. Refer to the EVAL-LT3073-AZ evaluation board user guide for further details. |
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