UPSD3422_V01 datasheet(28/300 Pages) STMICROELECTRONICS

28 / 300 page

Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

Hardware description

UPSD3422, UPSD3433, UPSD3434, UPSD3454

28/300

Hardware description

The UPSD34xx has a modular architecture built from a stacked die process. There are two

dice, one is designated “MCU module” in this document, and the other is designated “PSD

module” (see Figure 4 on page 29). In all cases, the MCU module die operates at 3.3 V with

5 V tolerant I/O. The PSD module is either a 3.3 V die or a 5 V die, depending on the

UPSD34xx device as described below.

The MCU module consists of a fast 8032 core, that operates with 4 clocks per instruction

cycle, and has many peripheral and system supervisor functions. The PSD module provides

the 8032 with multiple memories (two Flash and one SRAM) for program and data,

programmable logic for address decoding and for general-purpose logic, and additional I/O.

The MCU module communicates with the PSD module through internal address and data

busses (AD0 – AD15) and control signals (RD, WR, PSEN, ALE, RESET).

There are slightly different I/O characteristics for each module. I/Os for the MCU module are

designated as Ports 1, 3, and 4. I/Os for the PSD module are designated as Ports A, B, C,

and D.

For all 5 V UPSD34xx devices, a 3.3 V MCU module is stacked with a 5 V PSD module. In

this case, a 5 V UPSD34xx device must be supplied with 3.3 VCC for the MCU module and

5.0 VDD for the PSD module. Ports 3 and 4 of the MCU module are 3.3 V ports with

tolerance to 5 V devices (they can be directly driven by external 5 V devices and they can

directly drive external 5 V devices while producing a VOH of 2.4V min and VCC max). Ports

A, B, C, and D of the PSD module are true 5 V ports.

For all 3.3 V UPSD34xxV devices, a 3.3 V MCU module is stacked with a 3.3 V PSD

module. In this case, a 3.3 V UPSD34xx device needs to be supplied with a single 3.3 V

voltage source at both VCC and VDD. I/O pins on Ports 3 and 4 are 5 V tolerant and can be

connected to external 5 V peripherals devices if desired. Ports A, B, C, and D of the PSD

module are 3.3 V ports, which are not tolerant to external 5 V devices.

Refer to Table 3 for port type and voltage source requirements.

80-pin UPSD34xx devices provide access to 8032 address, data, and control signals on

external pins to connect external peripheral and memory devices. 52-pin UPSD34xx

devices do not provide access to the 8032 system bus.

All non-volatile memory and configuration portions of the UPSD34xx device are

programmed through the JTAG interface and no special programming voltage is needed.

This same JTAG port is also used for debugging of the 8032 core at runtime providing

breakpoint, single-step, display, and trace features. A non-volatile security bit may be

programmed to block all access via JTAG interface for security. The security bit is defeated

only by erasing the entire device, leaving the device blank and ready to use again.

Table 3.

Port type and voltage source combinations

Device type

VCC for MCU

module

VDD for PSD

module

Ports 1, 3, and 4 on

MCU module

Ports A, B, C, and D

on PSD module

5 V:

UPSD34xx

3.3 V

5.0 V

3.3 V (Ports 3 and 4 are

5 V tolerant)

5 V

3.3 V:

UPSD34xxV

3.3 V

3.3 V (Ports 3 and 4 are

5 V tolerant)

3.3 V. NOT 5 V tolerant

Obsolete

Product(s)

- Obsolete

Product(s)

UPSD3422 датащи(PDF) 28 Page - STMicroelectronics

UPSD3422 датащи(HTML) 28 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL