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UPSD3422 датащи(PDF) 71 Page - STMicroelectronics

номер детали UPSD3422
подробное описание детали  Turbo Plus series Fast Turbo 8032 MCU with USB and programmable logic
PDF  300 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

UPSD3422 датащи(HTML) 71 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
Obsolete
Product(s)
- Obsolete
Product(s)
UPSD3422, UPSD3433, UPSD3434, UPSD3454
MCU clock generation
71/300
3
CPUAR
R,W
Automatic MCU Clock Recovery
0 = There is no change of CPUPS[2:0] when an interrupt
occurs.
1 = Contents of CPUPS[2:0] automatically become 000b
whenever any interrupt occurs.
2:0
CPUPS
R,W
MCUCLK Pre-Scaler
000b: fMCU = fOSC (Default after reset)
001b: fMCU = fOSC/2
010b: fMCU = fOSC/4
011b: fMCU = fOSC/8
100b: fMCU = fOSC/16
101b: fMCU = fOSC/32
110b: fMCU = fOSC/1024
111b: fMCU = fOSC/2048
Table 29.
CCON1 PLL control register (SFR FAh, reset value 00h)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
PLLM[3:0]
PLLD[3:0]
Table 30.
CCON1 register bit definition
Bit
Symbol
R/W
Definition
7:4
PLLM[3:0]
R,W
Lower 4 bits of the 5-bit PLLM[4:0] Multiplier (Default after reset:
PLLM = 00h)
PLLM[4] is in the CCON0 register.
3:0
PLLD[3:0]
R,W
4-bit PLL Divider (Default after reset: PLLD = 0h)
Table 28.
CCON0 register bit definition (continued)
Bit
Symbol
R/W
Definition
Obsolete
Product(s)
- Obsolete
Product(s)



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