MCT8317A datasheet(64/161 Pages) TI1

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8.4 Device Functional Modes

8.4.1 Functional Modes

8.4.1.1 Sleep Mode

In sleep mode, the MOSFETs, sense amplifiers, buck regulator, charge pump, AVDD LDO regulator and the

I2C bus are disabled. The device can be configured to enter sleep (instead of standby) mode by configuring

DEV_MODE to 1b. SPEED pin and I2C speed command determine entry and exit from sleep state as described

in Table 8-2.

Note

During power-up and power-down of the device, the nFAULT pin is held low as the internal regulators

are disabled. After the regulators have been enabled, the nFAULT pin is automatically released.

8.4.1.2 Standby Mode

The device can be configured to operate as a standby device by setting DEV_MODE to 0b. In standby mode, the

charge pump, AVDD LDO, buck regulator and I2C bus are active while the motor is in stopped state waiting for

a suitable non-zero speed command. SPEED pin (analog, PWM or frequency based speed input) or I2C speed

command (I2C based speed input) determines entry and exit from standby state as described in Table 8-2.

The thresholds for entering and exiting standby mode in different speed input modes are as follows,

1. Analog : VEN_SB = (ZERO_DUTY_THR x VANA_FS), VEX_SB = ((ZERO_DUTY_THR + ZERO_DUTY_HYST) x

VANA_FS)

2. PWM : DutyEN_SB = ZERO_DUTY_THR, DutyEX_SB = (ZERO_DUTY_THR + ZERO_DUTY_HYST)

3. I2C : SPEED_CTRLEN_SB = ZERO_DUTY_THR x 32767, SPEED_CTRLEX_SB = (ZERO_DUTY_THR +

ZERO_DUTY_HYST) x 32767

4. Frequency : FreqEN_SB = ZERO_DUTY_THR x INPUT_MAX_FREQUENCY, FreqEX_SB =

(ZERO_DUTY_THR + ZERO_DUTY_HYST) x INPUT_MAX_FREQUENCY

Table 8-2. Conditions to Enter or Exit Sleep or Standby Modes

SPEED

COMMAND

MODE

ENTER STANDBY

CONDITION

EXIT FROM STANDBY

CONDITION

ENTER SLEEP CONDITION

EXIT FROM SLEEP

CONDITION

Analog

VSPEED < VEN_SB

VSPEED > VEX_SB

VSPEED < VEN_SL for

tDET_SL_ANA

VSPEED > VEX_SL for tDET_ANA

PWM

DutySPEED < DutyEN_SB

DutySPEED > DutyEX_SB

VSPEED < VIL for tDET_SL_PWM VSPEED > VIH for tDET_PWM

I2C

SPEED_CTRL <

SPEED_CTRLEN_SB

SPEED_CTRL >

SPEED_CTRLEX_SB

SPEED_CTRL is set to

0b for SLEEP_TIME and

VSPEED < VIL

VSPEED > VIH for tDET_PWM

Frequency

FreqSPEED < FreqEN_SB

FreqSPEED > FreqEX_SB

VSPEED < VIL for tDET_SL_PWM VSPEED > VIH for tDET_PWM

8.4.1.3 Fault Reset (CLR_FLT)

In the case of latched faults, the device goes into a partial shutdown state to help protect the power MOSFETs

and system. When the fault condition clears, the device can go to the operating state again by setting the

CLR_FLT to 1b.

8.5 External Interface

8.5.1 DAC outputs

MCT8317A has two 12-bit DACs which output analog voltage equivalent of digital variables on DACOUT1

and DACOUT2 pins with resolution of 12 bits and maximum voltage is 3-V. Signals available on DACOUT

pins is useful in tracking algorithm variables in real-time and can be used for tuning speed controller

or motor acceleration time. The address for variables for DACOUT1 and DACOUT2 are configured using

DACOUT1_VAR_ADDR and DACOUT2_VAR_ADDR. DACOUT1 is available on pin 37 and DACOUT2 can be

configured on pin 36 by setting DAC_SOX_CONFIG to 00b. DACOUT2 is also available on pin 38.

MCT8317A

SLLSFQ2 – JANUARY 2023

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