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MCT8317A датащи(PDF) 16 Page - Texas Instruments |
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MCT8317A датащи(HTML) 16 Page - Texas Instruments |
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16 / 161 page ![]() 8.2 Functional Block Diagram Optional external clock reference EEPROM Sensorless Trap Engine VM PGND ISENA OUTA OUTA VCP VGLS PGND VM PGND Integrated current sensing ISENB OUTB OUTB VCP VGLS PGND VM PGND Integrated current sensing ISENC OUTC OUTC VCP VGLS PGND PGND PGND PGND VM VM VIN_AVDD CP CPH CPL CCP 1µF CFLY 47nF Charge Pump Integrated current sensing VM CVM1 0.1µF CVM2 >10µF + DVDD DGND CDVDD 1µF AVDD LDO Regulator AVDD CAVDD 1µF AGND AVDD Out DVDD LDO Regulator Speed/power loop with profiles Fast accel & decel 120° & 150° comm. ISENA ISENB ISENC Protection Protection Protection Protection Protection Protection SCL SDA 2 EXT_WD EXT_CLK DACOUT1 DACOUT2/SOX I 2C Built-in 60-MHz Oscillator 12-bit ADC 12-bit DAC Variable monitoring on DACOUT1 & DACOUT2 pins, SOX output Op onal external clock reference AVDD VM OUTA OUTB OUTC A AVDD DACOUT2 CVIN_AVDD 1µF PGND BRAKE DIR SPEED/WAKE FG nFAULT PWM, Freq. or Analog Input AVDD ALARM IO Interface AVDD Note : VIN_AVDD can be tied to VM also Figure 8-1. MCT8317A Functional Block Diagram MCT8317A SLLSFQ2 – JANUARY 2023 www.ti.com 16 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: MCT8317A |
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