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FXPS7115D4 датащи(PDF) 34 Page - NXP Semiconductors |
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FXPS7115D4 датащи(HTML) 34 Page - NXP Semiconductors |
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34 / 75 page ![]() NXP Semiconductors FXPS7115D4 Digital absolute pressure sensor, 40 kPa to 115 kPa Bit Symbol Description 5 U_RW_ERR When ENDINIT is set, an error detection is enabled for all user writable registers. The error detection code is continuously calculated on the user writable registers and verified against a previously calculated error detection code. If a mismatch is detected in the error detection, the U_RW_ERR bit is set. This error is cleared by a read of the DEVSTAT2 register through any communication interface or on a data transmission that includes the error in the status field. 0 — No error detected 1 — Error detected in the user read/write array 4 U_W_ACTIVE The user OTP write in process status bit is set if a user initiated write to OTP is in process. The U_W_ACTIVE bit is automatically cleared once the write to OTP is complete. 0 — No OTP write in process 1 — OTP write in process 2 TEMP0_ERR The temperature error bit is set if an overtemperature or undertemperature condition exists. This error is cleared by a read of the DEVSTAT2 register through any communication interface or on a data transmission that includes the error in the status field. 0 — No error detected 1 — Overtemperature or undertemperature error condition detected Table 42. DEVSTAT2 - device status register (address 03h) bit description...continued 7.7.2.4 DEVSTAT3 - device status register (address 04h) Bit 7 6 5 4 3 2 1 0 Symbol MISO_ERR reserved reserved reserved reserved reserved reserved reserved Reset 0 reserved reserved reserved reserved reserved reserved reserved Access R R R R R R R R Table 43. DEVSTAT3 - device status register (address 04h) bit allocation Bit Symbol Description 7 MISO_ERR In SPI mode, the MISO data mismatch flag is set when a MISO Data mismatch fault occurs. The MISO_ERROR bit is cleared by a read of the DEVSTAT3 register through any communication interface, or by a status transmission including the error status through the SPI. 0 — No error detected 1 — MISO data mismatch Table 44. DEVSTAT3 - device status register (address 04h) bit description 7.7.3 TEMPERATURE - temperature register (address 0Eh) The temperature register is a read-only register that provides a temperature value for the IC. The temperature value is specified in the temperature sensor signal chain section of Table 104. Note: The device is only guaranteed to operate within the temperature limits specified in Section 10 "Static characteristics ". FXPS7115D4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 6 — 6 June 2022 34 / 75 |
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