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FXPS7115D4 датащи(PDF) 25 Page - NXP Semiconductors |
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FXPS7115D4 датащи(HTML) 25 Page - NXP Semiconductors |
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25 / 75 page ![]() NXP Semiconductors FXPS7115D4 Digital absolute pressure sensor, 40 kPa to 115 kPa 3. Following the transmitted message, the transmitter feeds 8 zeros into the shift register, to match the length of the CRC. 4. When the last zero is fed into the input adder, the shift register contains the CRC. 5. The CRC is transmitted. The CRC polynomial and seed are shown in Table 30. SPICRCSEED[3:0] Default Polynomial Default non-direct Seed 0000 x8+ x5+ x3+ x2+ x + 1 1111 1111 nonzero x8+ x5+ x3+ x2+ x + 1 1111 SPICRCSEED[3:0] Table 30. SPI Response Message CRC 7.5.5 Exception handling After POR, there a supply error flag is set. Expected initial responses with first 4 commands are shown in Table 31. Command Response Command 1 (DEVSTAT READ) Ignore response 1 Command 2 (DEVSTAT READ) Ignore response 2 Command 3 (DEVSTAT READ) Ignore response 3 Command 4 (ANY USER COMMAND) Response 4 - 0X6080XXXX[1] Table 31. Expected initial responses after tPOR_DataValid post POR [1] Response 4 is 0x6080XXXX after tPOR_DataValid wait time from POR. Otherwise only after tPOR_I2C/POR_SPI wait time from POR, response would be 0x6081XXXX due to DEVINIT bit still set to 1. Before soft reset, write SOURCEID_0 in address 1Ah with a non-zero value. Address 1Ah is read back to check soft reset sanity. During soft reset, flash contents are reloaded into the mirror registers and during this process the supply error flag can get set based on device variation, temperature, and so forth. After 1 ms delay, the expected initial response from the first 5 commands are shown in Table 32. Command Response Command 1 (DEVSTAT READ) Ignore response 1 Command 2 (DEVSTAT READ) Ignore response 2 Command 3 (DEVSTAT READ) Ignore response 3 Command 4 (SOURCEID_0 READ) Response 4 - 0X6080XXXX[1] Command 5 (ANY USER COMMAND) Response 5 - valid response with reset value of SOURCEID_0 Table 32. Expected initial responses after tPOR_DataValid post soft reset [1] Response 4 is 0x6080XXXX after tPOR_DataValid wait time from soft reset. Otherwise only after tPOR_I2C/POR_SPI wait time from soft reset, response 4 would be 0x6081XXXX due to DEVINIT bit still set to 1. 7.5.5.1 Basic status field All responses include a status field (ST[1:0]) that includes the general status of the device and transmitted data as described below. The contents of the status field is FXPS7115D4 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2022. All rights reserved. Product data sheet Rev. 6 — 6 June 2022 25 / 75 |
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