MFS5600AMBA0ES datasheet(46/111 Pages) NXP

46 / 111 page

NXP Semiconductors

FS5600

Automotive buck regulator and controller with voltage monitors and watchdog timer

used as ERRMON1/2, GPIO1/3 may be used to monitor an external signal on the

application that is indicative of an error outside the FS56. For example, ERRMON1 could

be connected to the PGOOD output of a PMIC and ERRMON2 could be connected to the

PGOOD of a secondary PMIC.

The ERRMON1/2 input is activated on entering the INIT_RUN state.

Once in the INIT_RUN state, the ERRMON1/2 pin is monitored to decide whether to the

transition to the NORMAL STATE.

Once in the NORMAL STATE a high or low on ERRMON1/2 (as selected by OTP), is

used to assert the FS0B pin as described below.

When OTP_ERRMON1/2_FLT_POL = 0, a low level on the ERRMON1/2 pin is detected

as a fault.

When OTP_ERRMON1/2_FLT_POL = 1, a high level on the ERRMON1/2 pin is detected

as a fault.

Upon detect of a fault, the ERRMONx_I bit is set in the FS5600. There is a

programmable timer (set by OTP_ERRMON1/2_ACK_TIME[1:0]) to allow the system

microcontroller to acknowledge the ERRMON fault.

The acknowledge is performed by writing 0b1 to the ERRMON1/2_I bit which in-turn

clears the bit.

If the ERRMON1/2_I bit is not cleared before the timer expires, the FS0B pin is asserted.

The below diagram shows an example of the ERRMON function.

aaa-037160

FS0B

INIT_RUN

NORMAL

INIT_RUN

MCU Acknowledgement

(via I2C)

FS0B asserted low due to

no acknowledgement until

timer expiry

ERRMONx

(applied externally)

Low level on ERRMONx detected as error

(OTP_ERRMONx_FLT_POL = 0)

Figure 17. Low-level ERRMONx detected as error

OTP_ERRMON1_ACK_TIME[1:0]

OTP_ERRMON2_ACK_TIME[1:0]

Acknowledge timer

1 ms

8 ms

16 ms

32 ms

Table 44. ERRMON acknowledge timer selection

FS5600

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 2 August 2022

46 / 111

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