LSM6DSV16X datasheet(95/196 Pages) STMICROELECTRONICS

95 / 196 page

9.60

TAP_DUR (5Ah)

Tap recognition function setting register (R/W)

Table 163. TAP_DUR register

DUR_3

DUR_2

DUR_1

DUR_0

QUIET_1

QUIET_0

SHOCK_1

SHOCK_0

Table 164. TAP_DUR register description

DUR_[3:0]

Duration of maximum time gap for double-tap recognition. Default: 0000

When double-tap recognition is enabled, this register expresses the maximum time between two consecutive

detected taps to determine a double-tap event. The default value of these bits is 0000b which corresponds to

16/ODR_XL time. If the DUR_[3:0] bits are set to a different value, 1LSB corresponds to 32/ODR_XL time.

QUIET_[1:0]

Expected quiet time after a tap detection. Default value: 00

Quiet time is the time after the first detected tap in which there must not be any overthreshold event. The

default value of these bits is 00b which corresponds to 2/ODR_XL time. If the QUIET_[1:0] bits are set to a

different value, 1LSB corresponds to 4/ODR_XL time.

SHOCK_[1:0]

Maximum duration of overthreshold event. Default value: 00

Maximum duration is the maximum time of an overthreshold signal detection to be recognized as a tap event.

The default value of these bits is 00b which corresponds to 4/ODR_XL time. If the SHOCK_[1:0] bits are set to

a different value, 1LSB corresponds to 8/ODR_XL time.

9.61

WAKE_UP_THS (5Bh)

Single/double-tap selection and wake-up configuration (R/W)

Table 165. WAKE_UP_THS register

SINGLE_

DOUBLE_TAP

USR_OFF

_ON_WU

WK_THS_5

WK_THS_4

WK_THS_3

WK_THS_2

WK_THS_1

WK_THS_0

Table 166. WAKE_UP_THS register description

SINGLE_DOUBLE_TAP

Enables single/double-tap event. Default value: 0

(0: only single-tap event enabled;

1: both single and double-tap events enabled)

USR_OFF_ON_WU

Drives the low-pass filtered data with user offset correction (instead of high-pass filtered data) to the

wake-up and the activity/inactivity functions. Refer to Figure 32. Default value: 0

WK_THS_[5:0]

Wake-up threshold. The resolution of the threshold depends on the value of

WU_INACT_THS_W_[2:0] in the INACTIVITY_DUR (54h) register. Default value: 000000

LSM6DSV16X

TAP_DUR (5Ah)

DS13510 - Rev 1

page 95/196

LSM6DSV16X датащи(PDF) 95 Page - STMicroelectronics

LSM6DSV16X датащи(HTML) 95 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL