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L9961 датащи(PDF) 62 Page - STMicroelectronics |
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L9961 датащи(HTML) 62 Page - STMicroelectronics |
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62 / 63 page ![]() List of figures Figure 1. Block diagram .................................................................... 5 Figure 2. Device FSM ...................................................................... 9 Figure 3. Timing diagram: transition from NORMAL to STANDBY upon GO2STBY command.................... 10 Figure 4. Timing diagram: transition from STANDBY to NORMAL upon WAKEUP detection ..................... 11 Figure 5. Voltage conversion routine steps....................................................... 15 Figure 6. Correct management of the task execution periodicity ........................................ 15 Figure 7. Example of cell UV detection ......................................................... 24 Figure 8. Current sense ADC total conversion error ................................................ 26 Figure 9. Balancing timing diagram ............................................................ 33 Figure 10. RDY pulse generation upon voltage conversion routine task termination ........................... 36 Figure 11. I2C clock polarity ................................................................. 39 Figure 12. I2C START/STOP conditions ......................................................... 39 Figure 13. I2C generic READ operation ......................................................... 41 Figure 14. I2C generic WRITE operation ......................................................... 41 Figure 15. Timing on the I2C bus .............................................................. 43 Figure 16. Power supply circuit ............................................................... 46 Figure 17. Cell voltage sensing and balancing circuit ................................................ 47 Figure 18. Current sense circuit ............................................................... 47 Figure 19. NTC measurement circuit............................................................ 48 Figure 20. HS/LS pre-drivers circuit ............................................................ 49 Figure 21. Fuse circuit ..................................................................... 49 Figure 22. Typical digital IOs circuit ............................................................ 50 Figure 23. Application circuit in LS/HS configuration ................................................. 51 Figure 24. Fail-safe switch in HS configuration ..................................................... 52 Figure 25. Fail-safe switch in LS configuation ..................................................... 53 Figure 26. VFQFPN (5x5x1.00 mm) package outline ................................................ 55 L9961 List of figures DS14012 - Rev 1 page 62/63 |
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