XGS datasheet(18/53 Pages) ONSEMI

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XGS Family

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POWER−UP AND POWER−DOWN SEQUENCE

POWER−UP SEQUENCE

The mandatory Power−Up sequence for the XGS sensor

is shown in Figure 12. The available power supplies

(VDD_IO,

VDD_PLL,

VDD,

VAA,

VAA_PIX,

VAA_PIX_BST, VAA_RD and VDD_SLVS) must have the

separation specified below.

1. Turn on VDD_IO power supply.

2. After 0−100

ms, turn on VDD_PLL power supply.

3. After 0−100

ms, turn on VDD power supply.

4. After 0−100

ms, turn on VAA power supply.

5. Once VAA is stable, power up VAA_PIX,

VAA_PIX_BST and VAA_RD.

6. Once VAA_PIX, VAA_PIX_BST and VAA_RD are

stable, power up VDD_SLVS.

7. After VDD_SLVS is stable, enable EXTCLK.

8. After EXTCLK has settled, hold RESET_N low

(active) for at least 30 EXTCLK cycles before

de−asserting the reset signal.

9. The sensor then loads the default register values

from its on−chip memory. As soon as RESET_N is

pulled up (released), the sensor starts loading the

default register values from it internal memory.

When loading is done (sensor_status_reg

R0x3706[4:0] −>0x03), the sensor is ready to

accept user uploads. user uploads (e.g. to

configure a special mode).

10. Enable PLL and initialize sensor’s internal analog

blocks (reset_register_reg = 0x001C).

11. Once the analog blocks are initialized

(sensor_status_reg R03706 −> 0xEB), the sensor

transitions to STANDBY state and is ready to start

image operations.

12. Enable the sequencer to transition to the

CAPTURE state (general_config0_reg[0] = 1).

Figure 12. Power−Up Sequence

EXTCLK (32.4 MHz)

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