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TMS320VC5441APGF датащи(PDF) 24 Page - Texas Instruments

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номер детали TMS320VC5441APGF
подробное описание детали  TMS320VC5441 Fixed-Point Digital Signal Processor
PDF  86 Pages
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TMS320VC5441APGF датащи(HTML) 24 Page - Texas Instruments

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Functional Overview
15
December 1999 – Revised April 2002
SPRS122E
Page 0
Data Memory
Page 1
Program Memory
Page 2
Page 3
0000h
8000h
FFFFh
MPDB
MPDB
Page 0
Data Memory
Page 1
Program Memory
Page 2
Page 3
MPAB3
0000h
8000h
FFFFh
MPDB
: reserved
MPAB3
MPAB0
MPAB1
MPAB2
MPAB0
MPAB1
MPAB2
Memory Map with OVLY = 1
Memory Map with OVLY = 0
MPDB
MPDB
MPDB
MPAB3
MPAB3
MPAB3
MDB0
or
MDB1
MDB0
or
MDB1
NOTES: A. MPDB: local program/data memory in subsystem B
B. MDB: local data memory in subsystem B. MDB is controlled by the data memory map register (DMMR).
DMMR=0, MDB0 is mapped in 8000h – FFFFh.
DMMR=1, MDB1 is mapped in 8000h – FFFFh.
C. MPAB: shared program memory in subsystems A and B
Figure 3–4. Subsystem B CPU Memory Map



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