TMS320VC5441APGF datasheet(19/86 Pages) TI

19 / 86 page

Introduction

December 1999 – Revised April 2002

SPRS122E

Table 2–3. Signal Descriptions (Continued)

NAME

DESCRIPTION

TYPE†

GENERAL-PURPOSE I/O PINS

A_GPIO0/

A_XF

Subsystem A GPIO0/

Subsystem A external flag output

These pins act according to the

B_GPIO0/

B_XF

I/O/Z§

Subsystem B GPIO0/

Subsystem B external flag output

These pins act according to the

general-purpose I/O register. The

x_XF bit must be set to “1” to drive the

C_GPIO0/

C_XF

I/O/Z§

Subsystem C GPIO0/

Subsystem C external flag output

x_XF bit must be set to 1 to drive the

x_XF output on the pin. If x_XF=0,

then these pins are general-purpose

I/Os

D_GPIO0/

D_XF

Subsystem D GPIO0/

Subsystem D external flag output

I/Os.

A_GPIO1/

A_BIO

Subsystem A GPIO1/

Subsystem A branch control input

These pins act according to the

B_GPIO1/

B_BIO

I/O/Z§

Subsystem B GPIO1/

Subsystem B branch control input

These pins act according to the

general-purpose I/O register. The

x_BIO bit must be set to “1” to drive the

C_GPIO1/

C_BIO

I/O/Z§

Subsystem C GPIO1/

Subsystem C branch control input

x_BIO bit must be set to 1 to drive the

x_BIO

input

into

the

device.

x_BIO=0,

then

these

pins

are

general purpose I/Os

General-purpose I/O pins (software-

programmable I/O signal)

Values

D_GPIO1/

D_BIO

Subsystem D GPIO1/

Subsystem D branch control input

general-purpose I/Os.

programmable I/O signal). Values

can be latched (output) by writing into

the GPIO register. The states of GPIO

A_GPIO2/

A_WTOUT

Subsystem A GPIO2/

Subsystem A watchdog timer output

The watchdog enable (WDEN) bit in

the GPIO register. The states of GPIO

pins (inputs) can be determined by

reading the GPIO register. The GPIO

direction is also programmable by

B_GPIO2/

B_WTOUT

I/O/Z§

Subsystem B GPIO2/

Subsystem B watchdog timer output

The watchdog enable (WDEN) bit in

the

watchdog

timer

(WDTSCR) is used to multiplex the

direction is also programmable by

way of the DIRn field in the register.

C_GPIO2/

C_WTOUT

I/O/Z§

Subsystem C GPIO2/

Subsystem C watchdog timer output

(WDTSCR) is used to multi lex the

watchdog timer output and GPIO2. If

WDEN=0,

then

these

pins

are

general purpose I/Os

D_GPIO2/

D_WTOUT

Subsystem D GPIO2/

Subsystem D watchdog timer output

general-purpose I/Os.

A_GPIO3/

A_TOUT

Subsystem A GPIO3/

Subsystem A timer output

These pins act according to the

B_GPIO3/

B_TOUT

I/O/Z§

Subsystem B GPIO3/

Subsystem B timer output

These pins act according to the

general-purpose I/O register. The

X_TOUT bit must be set to “1” to drive

C_GPIO3/

C_TOUT

I/O/Z§

Subsystem C GPIO3/

Subsystem C timer output

X_TOUT bit must be set to 1 to drive

the timer output on the pin. If

X_TOUT=0, then these pins are

general purpose I/Os

D_GPIO3/

D_TOUT

Subsystem D GPIO3/

Subsystem D timer output

general-purpose I/Os.

† I = Input, O = Output, S = Supply, Z = High Impedance

‡ This pin has an internal bus holder controlled by way of the BSCR register in TMS320C54x

 cLEAD core of DSP subsystem A.

§ This pin is placed in high-impedance when the EMU1/OFF pin operates as OFF and when EMU1/OFF = 0, this case is exclusively for testing

and emulation purposes.

¶ This pin has an internal pullup resistor.

# These pins are Schmitt triggered inputs.

|| This pin is used by Texas Instruments for device testing and should be left unconnected.

kThis pin has an internal pulldown resistor.

NOTE: Pins highlighted in grey indicate the multiplexed function of the pin.

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