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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8581 датащи(PDF) 32 Page - Wolfson Microelectronics plc |
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WM8581 датащи(HTML) 32 Page - Wolfson Microelectronics plc |
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32 / 94 page  WM8581 Product Preview w PP Rev 1.0 March 2006 32 INFINITE ZERO DETECT Setting the IZD register bit will enable the internal Infinite Zero Detect function: REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R16 DAC CONTROL 2 10h 7 IZD 0 Infinite zero detection circuit control and automute control 0 = Infinite zero detect automute disabled 1 = Infinite zero detect automute enabled Table 20 IZD Register With IZD enabled, applying 1024 consecutive zero input samples to a stereo input channel on any DAC will cause that stereo channel output to be muted. Mute will be removed as soon as either of those stereo channels receives a non-zero input. DAC DIGITAL VOLUME CONTROL The DAC volume may also be adjusted in the digital domain using independent digital attenuation control registers REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:0 LDA1[7:0] 11111111 (0dB) Digital Attenuation control for DAC1 Left Channel (DACL1) in 0.5dB steps. See Table 22 R20 DIGITAL ATTENUATION DACL 1 14h 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0 = Store LDA1 in intermediate latch (no change to output) 1 = Apply LDA1 and update attenuation on all channels 7:0 RDA1[6:0] 11111111 (0dB) Digital Attenuation control for DAC1 Right Channel (DACR1) in 0.5dB steps. See Table 22 R21 DIGITAL ATTENUATION DACR 1 15h 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0 = Store RDA1 in intermediate latch (no change to output) 1 = Apply RDA1 and update attenuation on all channels. 7:0 LDA2[7:0] 11111111 (0dB) Digital Attenuation control for DAC2 Left Channel (DACL2) in 0.5dB steps. See Table 22 R22 DIGITAL ATTENUATION DACL 2 16h 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0 = Store LDA2 in intermediate latch (no change to output) 1 = Apply LDA2 and update attenuation on all channels. 7:0 RDA2[7:0] 11111111 (0dB) Digital Attenuation control for DAC2 Right Channel (DACR2) in 0.5dB steps. See Table 22 R23 DIGITAL ATTENUATION DACR 2 17h 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0 = Store RDA2 in intermediate latch (no change to output) 1 = Apply RDA2 and update attenuation on all channels. 7:0 LDA3[7:0] 11111111 (0dB) Digital Attenuation control for DAC3 Left Channel (DACL3) in 0.5dB steps. See Table 22 R24 DIGITAL ATTENUATION DACL3 18h 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0 = Store LDA3 in intermediate latch (no change to output) 1 = Apply LDA3 and update attenuation on all channels. 7:0 RDA3[7:0] 11111111 (0dB) Digital Attenuation control for DAC3 Right Channel (DACR3) in 0.5dB steps. See Table 22 R25 DIGITAL ATTENUATION DACR3 19h 8 UPDATE Not latched Controls simultaneous update of all Attenuation Latches 0 = Store RDA3 in intermediate latch (no change to output) 1 = Apply RDA3 and update attenuation on all channels. |
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