WM8581 datasheet(55/94 Pages) WOLFSON

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WM8581

PP Rev 1.0 March 2006

S/PDIF TRANSMITTER

The S/PDIF transmitter generates the S/PDIF frames, and outputs on the SPDIFOP pin. The audio

data for the frame can be taken from one of four sources, selectable using the TXSRC register. The

transmitter can be powered down using the SPDIFTXD register bit. The S/PDIF Transmitter can be

bypassed by setting the REAL_THROUGH register control bit. When set, the SPDIFOP pin sources

the output of the S/PDIF input mux.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

1:0

TXSRC[1:0]

S/PDIF Transmitter Data Source

00 = S/PDIF received data (see REAL_THROUGH)

01 = ADC digital output data.

10 = Secondary Audio Interface

11 = Audio Interface received data

OVWCHAN

Overwrite Channel Status

Only used if TXSRC=00. Overwrites the received

channel status data using data read from S/PDIF

transmitter channel status register

0 = Channel data equal to recovered channel data.

1 = Channel data taken from channel status registers.

R30

SPDTXCHAN 0

1Eh

REAL_

THROUGH

S/PDIF Through Mode Control

0 = SPDIFOP pin sources output of S/PDIF Transmitter

1 = SPDIFOP pins sources output of S/PDIF IN Mux

R51

PWRDN 2

33h

SPDIFTXD

S/PDIF Transmitter powerdown

0 = S/PDIF Transmitter enabled

1 = S/PDIF Transmitter disabled

Table 47 S/PDIF Transmitter Control

The WM8581 also transmits the preamble and VUCP bits (Validity, User Data, Channel Status and

Parity bits).

Validity Bit

Set to 0 (to indicate valid data) – unless TXSRC=00 (S/PDIF receiver), where Validity is the value

recovered from the S/PDIF input stream by the S/PDIF receiver.

User Data

Set to 0 as User Data configuration is not supported in the WM8581 – if TXSRC=00 (S/PDIF

receiver) User Data is the value recovered from the S/PDIF input stream by the S/PDIF receiver.

Channel Status

The Channel Status bits form a 192-frame block - transmitted at 1 bit per sub-frame. Each sub-frame

forms its own 192-frame block. The WM8581 is a consumer mode device and only the first 40 bits of

the block are used. All data transmitted from the WM8581 is stereo, so the channel status data is

duplicated for both channels. The only exception to this is the channel number bits (23:20) which can

be changed to indicate whether the channel is left or right in the stereo image. Bits within this block

can be configured by setting the Channel Status Bit Control registers (see Table 48 to Table 52). If

TXSRC=00 (S/PDIF receiver), the Channel Status bits are transmitted with the same values

recovered by the receiver – unless OVWCHAN is set, in which case they are set by the S/PDIF

transmitter channel status registers.

Parity Bit

This bit maintains even parity for data as a means of basic error detection. It is generated by the

transmitter.

For further details of all channel status bits, refer to IEC-60958-3.

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