AD5413

Data Sheet

Rev. 0 | Page 40 of 49

User Gain Register

Address: 0x04, Reset: 0x04FFFC, Name: USER_GAIN

The 14 USER_GAIN bits allow the user to adjust the gain of the DAC channel in steps of 1 LSB. The USER_GAIN register coding is straight

binary. The default code is 0xFFFC. Theoretically, the gain can be tuned across the full range of the output. However, the maximum

recommended gain trim is approximately 50% of the programmed range to maintain accuracy.

Table 26. Bit Descriptions for USER_GAIN

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:2]

USER_GAIN

User Gain Correction Code.

0x3FFF

R/W

[1:0]

RESERVED

Do not write to these bits.

0x0

R/W

User Offset Register

Address: 0x05, Reset: 0x058000, Name: USER_OFFSET

The USER_OFFSET register allows the user to adjust the DAC channel offset by −8192 LSBs to +8192 LSBs in steps of 1 LSB. The

USER_OFFSET register coding is straight binary. The default code is 0x8000, which results in zero offset programmed to the output.

Table 27. Bit Descriptions for USER_OFFSET

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:2]

USER_OFFSET

User Offset Correction Code.

0x2000

R/W

[1:0]

RESERVED

Do not write to these bits.

0x0

R/W

DAC Configuration Register

Address: 0x06, Reset: 0x060C00, Name: DAC_CONFIG

and configures the slew rate control function.

Table 28. Bit Descriptions for DAC_CONFIG

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:13]

SR_STEP

Slew Rate Step. In conjunction with the slew rate clock, the slew rate step defines how much

the output value changes at each update. Together, both parameters define the rate of

change of the output value.

0x0

R/W

000: 4 LSB (default).

001: 12 LSB.

010: 64 LSB.

011: 120 LSB.

100: 256 LSB.

101: 500 LSB.

110: 1820 LSB.

111: 2048 LSB.

[12:9]

SR_CLOCK

Slew Rate Clock. The slew rate clock defines the rate at which the digital slew is updated.

0x6

R/W

0000: 240 kHz.

0001: 200 kHz.

0010: 150 kHz.

0011: 128 kHz.

0100: 64 kHz.

0101: 32 kHz.

0110: 16 kHz (default).