Data Sheet

AD5413

Rev. 0 | Page 39 of 49

REGISTER DETAILS

NOP Register

Address: 0x00, Reset: 0x000000, Name: NOP

Write 0x0000 to Bits[15: 0] at this address to perform an NOP command. Bits[15:0] of the NOP register always read back as 0x0000.

Table 22. Bit Descriptions for NOP

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:0]

NOP command

Write 0x0000 to these bits to perform an NOP command.

0x0

R0/W

DAC Input Register

Address: 0x01, Reset: 0x010000, Name: DAC_INPUT

Bits[15:2] consist of the 14-bit data to be written to the DAC. If the LDAC pin is tied low (active), the DAC_INPUT register contents are written

directly to the DAC_OUTPUT register without any LDAC functionality dependence. If the LDAC pin is tied high, the contents of the

DAC_INPUT register are written to the DAC_OUTPUT register when the LDAC pin is brought low or when the software LDAC

command is written.

Table 23. Bit Descriptions for DAC_INPUT

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:2]

DAC_INPUT_DATA

DAC Input Data.

0x0

R/W

[1:0]

RESERVED

Do not write to these bits.

0x0

R/W

DAC Output Register

Address: 0x02, Reset: 0x020000, Name: DAC_OUTPUT

The DAC_OUTPUT register is a read only register and contains the latest calibrated 14-bit DAC output value.

Table 24. Bit Descriptions for DAC_OUTPUT

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:2]

DAC_OUTPUT_DATA

DAC Output Data. For example, the last calibrated 14-bit DAC output value.

0x0

R

[1:0]

RESERVED

Do not write to these bits.

0x0

R/W

Clear Code Register

Address: 0x03, Reset: 0x030000, Name: CLEAR_CODE

When writing to the CLEAR_CODE register, Bits[15:2] consist of the clear code that clears the DAC when a clear event occurs. When a

clear event is complete, write to the DAC_INPUT register with the 14-bit data to be written to the DAC, even if the data is the same data

as previously written before the clear event. Performing an LDAC write to the hardware or software does not update the DAC_OUTPUT

register to a new code until the DAC_INPUT register is written to first.

Table 25. Bit Descriptions for CLEAR_CODE

Bits

Bit Name

Description

Reset

Access

21

FAULT_PIN_STATUS

This bit reflects the current status of the FAULT pin.

0x0

R

[20:16]

REGISTER_ADDRESS

Register Address.

0x0

R

[15:2]

CLEAR_CODE

Clear Code. The DAC clears to this code upon a clear event.

0x0

R/W

[1:0]

RESERVED

Do not write to these bits.

0x0

R/W