| поискавой системы для электроныых деталей |
|
PCF8545 датащи(PDF) 12 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCF8545 датащи(HTML) 12 Page - NXP Semiconductors |
|
12 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 Internal oscillator 230 kHz 1 0 Programmable divider 0 1 LCD waveform generator aaa-008323 OSCCLK pin LCD frame frequency selection, q EFR (2) 9.6 kHz (3) OSC COE (1) 1. Can only be used with the internal oscillator (OSC = 0). 2. Can only be used with an external oscillator (OSC = 1). 3. Nominal value for divide factor q is 24; source clock is 230 kHz (see Section 7.1.7). Figure 7. Oscillator selection OSC COE EFR OSCCLK pin Clock source 0 0 not used inactive; may be left floating internal oscillator used 0 1 not used output of internal oscillator frequency (prescaler) internal oscillator used 1 not used 0 9.6 kHz input OSCCLK pin 1 not used 1 230 kHz input OSCCLK pin Table 10. Valid combinations of bits OSC, EFR, and COE Usage OSC COE EFR LCD with internal oscillator 0 0 not used LCD with external oscillator (230 kHz) 1 not used 1 LCD with external oscillator (9.6 kHz) 1 not used 0 Table 11. Typical use of bits OSC, EFR, and COE 7.1.4.1 Oscillator The system is designed to operate from a 9.6 kHz or a 230 kHz clock. This clock can be sourced internally or externally. The internal logic and LCD drive signals of the PCF8545 are timed either by the internal oscillator or from the clock externally supplied. Internal clock When the internal oscillator is used, all LCD signals are generated from it. The oscillator runs at nominal 230 kHz. The relationship between this frequency and the LCD frame frequency is detailed in Section 7.1.7. Control over the internal oscillator is made with the OSC bit (see Section 7.1.4). It is possible to make the internal oscillator signal available on pin OSCCLK by using the oscillator-control command (see Table 9) and configuring the clock output enable (COE) bit. If not required, the pin OSCCLK should be left open or connected to VSS. At power-on the signal at pin OSCCLK is disabled and pin OSCCLK is in 3-state. PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 12 / 68 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |